Cheng Chen, Funchun Yang, F. Wang, Liang Deng, Dan Zhao
{"title":"CPU-MIC异构系统的编程与性能优化研究进展","authors":"Cheng Chen, Funchun Yang, F. Wang, Liang Deng, Dan Zhao","doi":"10.1109/ICIVC.2018.8492841","DOIUrl":null,"url":null,"abstract":"Heterogeneous architectures are widely adopted in high performance computing. The MIC (Many Integrated Cores) processor, unveiled by Intel, has been widely used and draws attention by simplifying heterogeneous programming and improving performance. In this paper, we first introduce the architecture and executing models of MIC. Then we discuss programming and performance optimization on MIC system. Finally, some open issues and future directions in the heterogeneous system are discussed.","PeriodicalId":173981,"journal":{"name":"2018 IEEE 3rd International Conference on Image, Vision and Computing (ICIVC)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Review of Programming and Performance Optimization on CPU-MIC Heterogeneous System\",\"authors\":\"Cheng Chen, Funchun Yang, F. Wang, Liang Deng, Dan Zhao\",\"doi\":\"10.1109/ICIVC.2018.8492841\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Heterogeneous architectures are widely adopted in high performance computing. The MIC (Many Integrated Cores) processor, unveiled by Intel, has been widely used and draws attention by simplifying heterogeneous programming and improving performance. In this paper, we first introduce the architecture and executing models of MIC. Then we discuss programming and performance optimization on MIC system. Finally, some open issues and future directions in the heterogeneous system are discussed.\",\"PeriodicalId\":173981,\"journal\":{\"name\":\"2018 IEEE 3rd International Conference on Image, Vision and Computing (ICIVC)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 3rd International Conference on Image, Vision and Computing (ICIVC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIVC.2018.8492841\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 3rd International Conference on Image, Vision and Computing (ICIVC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIVC.2018.8492841","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Review of Programming and Performance Optimization on CPU-MIC Heterogeneous System
Heterogeneous architectures are widely adopted in high performance computing. The MIC (Many Integrated Cores) processor, unveiled by Intel, has been widely used and draws attention by simplifying heterogeneous programming and improving performance. In this paper, we first introduce the architecture and executing models of MIC. Then we discuss programming and performance optimization on MIC system. Finally, some open issues and future directions in the heterogeneous system are discussed.
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