一种基于FPGA加速器的高效CNN图像分类体系

Shahmustafa Mujawar, D. Kiran, Hariharan Ramasangu
{"title":"一种基于FPGA加速器的高效CNN图像分类体系","authors":"Shahmustafa Mujawar, D. Kiran, Hariharan Ramasangu","doi":"10.1109/ICAECC.2018.8479517","DOIUrl":null,"url":null,"abstract":"Image classification finds its suitability in applications ranging from medical diagnostics to autonomous vehicles. The existing architectures are computationally exhaustive, complex and less accurate. An accurate, simple and hardware efficient architecture is required to be developed for image classification. In this paper, Convolutional Neural Network (CNN) architecture has been proposed and validated using MNIST handwritten dataset. The adopted approaches of sliding-filter for convolution and parallel computation of Multiplication and Accumulation (MAC) operations resulted in optimized hardware architecture with reduced arithmetic operations and faster computations. The developed architecture has been implemented on Artix-7 FPGA and attained a significant improvement in speed compared to existing architecture working at 300MHz maximum operating frequency.","PeriodicalId":106991,"journal":{"name":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2018-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"An Efficient CNN Architecture for Image Classification on FPGA Accelerator\",\"authors\":\"Shahmustafa Mujawar, D. Kiran, Hariharan Ramasangu\",\"doi\":\"10.1109/ICAECC.2018.8479517\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Image classification finds its suitability in applications ranging from medical diagnostics to autonomous vehicles. The existing architectures are computationally exhaustive, complex and less accurate. An accurate, simple and hardware efficient architecture is required to be developed for image classification. In this paper, Convolutional Neural Network (CNN) architecture has been proposed and validated using MNIST handwritten dataset. The adopted approaches of sliding-filter for convolution and parallel computation of Multiplication and Accumulation (MAC) operations resulted in optimized hardware architecture with reduced arithmetic operations and faster computations. The developed architecture has been implemented on Artix-7 FPGA and attained a significant improvement in speed compared to existing architecture working at 300MHz maximum operating frequency.\",\"PeriodicalId\":106991,\"journal\":{\"name\":\"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICAECC.2018.8479517\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 Second International Conference on Advances in Electronics, Computers and Communications (ICAECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAECC.2018.8479517","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14

摘要

图像分类在从医疗诊断到自动驾驶汽车的各种应用中都很适合。现有的体系结构在计算上是详尽的、复杂的,而且不太准确。为了实现图像分类,需要开发一种准确、简单、硬件高效的体系结构。本文提出了卷积神经网络(CNN)架构,并使用MNIST手写数据集进行了验证。采用滑动滤波卷积和并行计算乘法累加运算的方法,优化了硬件结构,减少了算术运算,提高了计算速度。所开发的架构已在Artix-7 FPGA上实现,与工作在300MHz最大工作频率下的现有架构相比,速度有了显着提高。
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An Efficient CNN Architecture for Image Classification on FPGA Accelerator
Image classification finds its suitability in applications ranging from medical diagnostics to autonomous vehicles. The existing architectures are computationally exhaustive, complex and less accurate. An accurate, simple and hardware efficient architecture is required to be developed for image classification. In this paper, Convolutional Neural Network (CNN) architecture has been proposed and validated using MNIST handwritten dataset. The adopted approaches of sliding-filter for convolution and parallel computation of Multiplication and Accumulation (MAC) operations resulted in optimized hardware architecture with reduced arithmetic operations and faster computations. The developed architecture has been implemented on Artix-7 FPGA and attained a significant improvement in speed compared to existing architecture working at 300MHz maximum operating frequency.
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