E. Siivola, P. Thomas, K. Coonley, A. Reddy, J. Posthill, B. Cook, R. Venkatasubramanian
{"title":"高性能超晶格冷级联的高效分段体器件","authors":"E. Siivola, P. Thomas, K. Coonley, A. Reddy, J. Posthill, B. Cook, R. Venkatasubramanian","doi":"10.1109/ICT.2005.1519888","DOIUrl":null,"url":null,"abstract":"Segmented bulk single-couple devices have been fabricated using SiGe, PbTe, and TAGS materials. Initial optimization studies have yielded power generation efficiencies in excess of 12%, with cold-side temperatures of /spl sim/175/spl deg/C and hot-side temperatures of /spl sim/700/spl deg/C. The goal is to cascade these devices with high-performance Bi/sub 2/Te/sub 3/-superlattice cold-stage operating between 25/spl deg/C to 175/spl deg/C. We will be discussing the trade space between segmented and cascaded assemblies as it relates to the thermal and electrical matching between the different layers and device complexity. It will be shown how layer matching affects overall device performance and how this knowledge can be used to determine the optimal design. We will also discuss the methodologies used to meet the various challenges of high temperature materials assembly including ohmic contacts, diffusion barriers, and CTE induced stresses. Measurement results of device performance will be provided to illustrate the consequences of the methodologies used. We will also include results from early integration of these 2-stage segmented devices to thin-film superlattice cold-stage device to yield three stage power devices.","PeriodicalId":422400,"journal":{"name":"ICT 2005. 24th International Conference on Thermoelectrics, 2005.","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High efficiency segmented bulk devices cascaded with high-performance superlattice cold-stage\",\"authors\":\"E. Siivola, P. Thomas, K. Coonley, A. Reddy, J. Posthill, B. Cook, R. Venkatasubramanian\",\"doi\":\"10.1109/ICT.2005.1519888\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Segmented bulk single-couple devices have been fabricated using SiGe, PbTe, and TAGS materials. Initial optimization studies have yielded power generation efficiencies in excess of 12%, with cold-side temperatures of /spl sim/175/spl deg/C and hot-side temperatures of /spl sim/700/spl deg/C. The goal is to cascade these devices with high-performance Bi/sub 2/Te/sub 3/-superlattice cold-stage operating between 25/spl deg/C to 175/spl deg/C. We will be discussing the trade space between segmented and cascaded assemblies as it relates to the thermal and electrical matching between the different layers and device complexity. It will be shown how layer matching affects overall device performance and how this knowledge can be used to determine the optimal design. We will also discuss the methodologies used to meet the various challenges of high temperature materials assembly including ohmic contacts, diffusion barriers, and CTE induced stresses. Measurement results of device performance will be provided to illustrate the consequences of the methodologies used. We will also include results from early integration of these 2-stage segmented devices to thin-film superlattice cold-stage device to yield three stage power devices.\",\"PeriodicalId\":422400,\"journal\":{\"name\":\"ICT 2005. 24th International Conference on Thermoelectrics, 2005.\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICT 2005. 24th International Conference on Thermoelectrics, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICT.2005.1519888\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICT 2005. 24th International Conference on Thermoelectrics, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICT.2005.1519888","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High efficiency segmented bulk devices cascaded with high-performance superlattice cold-stage
Segmented bulk single-couple devices have been fabricated using SiGe, PbTe, and TAGS materials. Initial optimization studies have yielded power generation efficiencies in excess of 12%, with cold-side temperatures of /spl sim/175/spl deg/C and hot-side temperatures of /spl sim/700/spl deg/C. The goal is to cascade these devices with high-performance Bi/sub 2/Te/sub 3/-superlattice cold-stage operating between 25/spl deg/C to 175/spl deg/C. We will be discussing the trade space between segmented and cascaded assemblies as it relates to the thermal and electrical matching between the different layers and device complexity. It will be shown how layer matching affects overall device performance and how this knowledge can be used to determine the optimal design. We will also discuss the methodologies used to meet the various challenges of high temperature materials assembly including ohmic contacts, diffusion barriers, and CTE induced stresses. Measurement results of device performance will be provided to illustrate the consequences of the methodologies used. We will also include results from early integration of these 2-stage segmented devices to thin-film superlattice cold-stage device to yield three stage power devices.