Fault tolerant heterogeneous MPSOC schedule length minimization based on platform reliability

Fault tolerant scheduling has been a subject of great concern recently, considering heterogeneous multiprocessor systems that may contain low reliability processors in their systems. Task replication is an established technique to achieve fault tolerance; however it has a negative influence on schedule length. Moreover increasing system reliability always has a negative impact on schedule length. In this paper we devised a new method for optimizing schedule length and maximizing system reliability simultaneously using simulated annealing. Schedule length is investigated in case of fault free operation and in the presence of a processor fault and then the schedule length is averaged based on the probability of the schedule success and failure, then this average schedule length is optimized to the minimum to give the lowest possible makespan in both cases. Results show that our algorithm is able to maximize the system reliability without degrading schedule length, in fact increasing system reliability decrease the averaged schedule length and hence the system overall performance in all cases.