30gbit /s 1.7 pJ/bit共阴极可调谐850nm - vcsel驱动

2017 IEEE Optical Interconnects Conference (OI) Pub Date : 2017-06-01 DOI:10.1109/OIC.2017.7965526

László Szilágyi, Guido Belfiore, R. Henker, F. Ellinger

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引用次数: 5

摘要

提出了一种用28纳米数字CMOS实现的共阴极VCSEL驱动器，并与商用VCSEL组装在一起。电光测量显示，在2.9 v电源下，在1.7 pj /bit下运行30gbit /s。当工作在15 gbit /s时，可以在保持调制幅度的情况下降低功率。演示了电源/数据的可调性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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30 Gbit/s 1.7 pJ/bit common-cathode tunable 850-nm-VCSEL driver in 28 nm digital CMOS

A common-cathode VCSEL driver implemented in 28-nm digital CMOS, assembled with a commercial VCSEL is presented. Electro-optical measurements show 30-Gbit/s operation with 1.7-pJ/bit from 2.9-V supply. When operated at 15-Gbit/s the power can be reduced while maintaining the modulation amplitude. Power/datarate tunability is demonstrated.

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2017 IEEE Optical Interconnects Conference (OI)

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