一种验证高阶σ - δ调制器极限环的方法

V. Mladenov
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引用次数: 3

摘要

本文给出了一种验证高阶σ - δ调制器极限环的方法。该方法是先前作者工作的扩展,并基于调制器的并行分解。在这种表示中,一般的n阶调制器被转换成低阶的,通常是复杂的调制器的分解,它们只通过量化函数相互作用。所考虑的分解有助于容易地描述调制器的时域行为。在此基础上,给出了高阶调制器在恒输入条件下极限环存在的条件。它们是由一阶调制器状态的周期性条件决定的。在这种情况下,状态变量是解耦合的,得到的条件很容易检查。极限环对应于周期输出序列,作者在之前的工作中也提出了验证条件。这里详细地考虑了这些条件。它们有助于搜索具有不同长度的可能极限环。
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A method for validation the limit cycles of high order Sigma-Delta modulators
In this paper an approach for validation of potential limit cycles of high order Sigma-Delta modulators is presented. The approach is an extension of a previous authors work and is based on a parallel decomposition of the modulator. In this representation, the general N-th order modulator is transformed into a decomposition of low order, generally complex modulators, which interact only through the quantizer function. The decomposition considered helps for easy description of the time-domain behavior of the modulator. Based on this in the previous authors work, the conditions for the existence of limit cycles in the high order modulator, for constant inputs are obtained. They are determined by the periodicity conditions for the states of the first order modulators. In this case, the state variables are uncoupled and the obtained conditions are very easy to be checked. Limit cycles correspond to periodic output sequences and in the previous work the validation conditions are also proposed by the author. Here these conditions are considered in details. They help to search the possible limit cycles with different lengths.
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