一种将附加数据嵌入fpga单元程序代码中的非等效隐写方法

O. Ivanova, Oleksandr Drozd, K. Zashcholkin, M. Kuznietsov
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The tradi-tional approach to steganographic embedding in FPGA program code is based on the use of equivalent transformations of the program code. Such transformations do not change the target function of the program code or the operation of the FPGA chip. However, the traditional approach provides a relatively small effective volume of the stego container. This leads to the fact that it is usually possible to steganographically store only control data for one type of monitoring. It is proposed to additionally use a non-equivalent approach to steganographic embedding of data into the FPGA program code. Such transformations, despite their non-equivalence, do not change the target function of the program code. This is achieved by applying transformations to the program code of units that perform arithmetic operations on approximate data. For arithmetic operations on approximate data there is often a requirement that the operands and the result are the same size. To satisfy this requirement the complete result of the operation is computed first. After that some bits of the result are discarded and rounding is performed. It is proposed to allocate elementary LUT units in the FPGA structure, which participate only in the calculation of discarded bits (and do not participate in the calculation of the remaining bits). Program codes of such LUTs can be non-equivalently changed during steganographic embedding. Distortion of the FPGA program code of such units does not distort the behavior of the FPGA chip. This is a consequence of the fact that such LUTs are not involved in the formation of the discarded bits. Results. We have developed software that, together with Intel Quartus CAD system, extracts detailed information about an FPGA project. This information includes the structure of the circuit in the project and the program codes of the units of this circuit. An application has also been developed that uses this information to determine non-equivalent steganographic resources. With the help of the devel-oped software, an experimental estimation of the additional volume of the stego container is performed. Originality. An approach to the use of non-equivalent transformations of the program code of FPGA chips for steganographic embed-ding of additional data is proposed. This approach is proposed to be used together with the traditional approach, which is based on equivalent transformations of the program code. Practical value. The steganographic embedding approach proposed in this paper allows increasing the effective volume of the stego container in the FPGA program code. By ap-plying this approach, it becomes possible to secretly store monitoring data of several types of monitoring in FPGA stego containers. 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引用次数: 0

摘要

目的。在FPGA程序代码中增加隐码容器的有效体积。为了达到这一目的,增加了一个FPGA程序代码的非等效转换过程。非等效转换是对传统程序代码等效转换过程的补充。这两种类型的转换的联合使用可以达到本文的目的。方法。隐写方法用于将附加数据隐入FPGA芯片程序代码中。在这种情况下,FPGA程序代码是一个stego容器。采用隐写容器嵌入程序对FPGA程序代码进行隐写监控。为此,监控数据被嵌入到程序代码中并秘密存储在那里。在FPGA程序代码中嵌入隐写的传统方法是基于程序代码的等效变换。这种转换不会改变程序代码的目标功能或FPGA芯片的操作。然而,传统的方法提供了一个相对较小的有效体积的stego容器。这导致这样一个事实,即通常可以隐写技术只存储一种监视类型的控制数据。此外,还提出了一种非等效方法将数据隐写嵌入到FPGA程序代码中。这样的转换,尽管它们不等价,但不会改变程序代码的目标函数。这是通过对对近似数据执行算术运算的单元的程序代码应用转换来实现的。对于近似数据的算术运算,通常要求操作数和结果大小相同。为了满足这一要求,首先计算操作的完整结果。之后,结果的一些位被丢弃并执行舍入。建议在FPGA结构中分配基本LUT单元,它只参与丢弃位的计算(而不参与剩余位的计算)。这种lut的程序代码在隐写嵌入过程中可以被非等效地改变。这种单元的FPGA程序代码的失真不会扭曲FPGA芯片的行为。这是由于这样的lut不参与丢弃位的形成这一事实的结果。结果。我们开发了软件,与英特尔Quartus CAD系统一起,提取FPGA项目的详细信息。该信息包括项目中电路的结构和该电路单元的程序代码。还开发了一个应用程序,该应用程序使用该信息来确定非等效隐写资源。在开发的软件的帮助下,对暗箱的附加体积进行了实验估计。创意。提出了一种利用FPGA芯片程序代码的非等效变换实现附加数据隐写嵌入的方法。该方法可与基于程序代码等效变换的传统方法结合使用。实用价值。本文提出的隐写嵌入方法可以增加FPGA程序代码中隐写容器的有效体积。通过应用这种方法,可以将多种监控类型的监控数据秘密存储在FPGA隐式容器中。参考文献10,图2。
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AN APPROACH TO NON-EQUIVALENT STEGANOGRAPHIC EMBEDDING OF ADDITIONAL DATA INTO THE PROGRAM CODE OF FPGA LUT UNITS
Purpose. To increase the effective volume of stego containers in the FPGA program code. To achieve this purpose, an additional procedure of non-equivalent transformations of FPGA program code is added. Non-equivalent transfor-mations complement the traditional procedure of equivalent transformations of program code. The joint use of these two types of transformations leads to the achievement of the purpose of this paper. Methodology. The steganographic ap-proach is used to covertly embed additional data into the FPGA chip program code. In this case the FPGA program code is a stego container. The stego container embedding procedure is used to perform hidden monitoring of the FPGA program code. For this purpose, monitoring data is embedded into the program code and secretly stored there. The tradi-tional approach to steganographic embedding in FPGA program code is based on the use of equivalent transformations of the program code. Such transformations do not change the target function of the program code or the operation of the FPGA chip. However, the traditional approach provides a relatively small effective volume of the stego container. This leads to the fact that it is usually possible to steganographically store only control data for one type of monitoring. It is proposed to additionally use a non-equivalent approach to steganographic embedding of data into the FPGA program code. Such transformations, despite their non-equivalence, do not change the target function of the program code. This is achieved by applying transformations to the program code of units that perform arithmetic operations on approximate data. For arithmetic operations on approximate data there is often a requirement that the operands and the result are the same size. To satisfy this requirement the complete result of the operation is computed first. After that some bits of the result are discarded and rounding is performed. It is proposed to allocate elementary LUT units in the FPGA structure, which participate only in the calculation of discarded bits (and do not participate in the calculation of the remaining bits). Program codes of such LUTs can be non-equivalently changed during steganographic embedding. Distortion of the FPGA program code of such units does not distort the behavior of the FPGA chip. This is a consequence of the fact that such LUTs are not involved in the formation of the discarded bits. Results. We have developed software that, together with Intel Quartus CAD system, extracts detailed information about an FPGA project. This information includes the structure of the circuit in the project and the program codes of the units of this circuit. An application has also been developed that uses this information to determine non-equivalent steganographic resources. With the help of the devel-oped software, an experimental estimation of the additional volume of the stego container is performed. Originality. An approach to the use of non-equivalent transformations of the program code of FPGA chips for steganographic embed-ding of additional data is proposed. This approach is proposed to be used together with the traditional approach, which is based on equivalent transformations of the program code. Practical value. The steganographic embedding approach proposed in this paper allows increasing the effective volume of the stego container in the FPGA program code. By ap-plying this approach, it becomes possible to secretly store monitoring data of several types of monitoring in FPGA stego containers. References 10, figures 2.
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