一种具有分流谐振电流复用拓扑的低功耗超紧凑CMOS LNA

M. Wei, Sheng-Fuh Chang, Yu-Chun Liu
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引用次数: 26

摘要

提出了一种并联谐振电流复用拓扑结构的低功耗超小型CMOS低噪声放大器。共源晶体管通过并联谐振级间匹配网络连接,使偏置电流共享,具有低功耗,射频信号被加倍放大,具有高增益和低噪声系数。所实现的0.18 μ m CMOS LNA功率增益为15.2 dB,噪声系数为3.0 dB,功耗仅为1.81 mW。与先前发布的电流复用LNA相比,该LNA的芯片尺寸最小,为0.28 mm2(不包括I/O焊盘),FOM最高,为2.77。
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A Low-Power Ultra-Compact CMOS LNA with Shunt-Resonating Current-Reused Topology
A low-power ultra-compact CMOS low-noise amplifier (LNA) in a shunt-resonating current-reused topology is presented. The common-source transistors are connected with a shunt-resonating inter-stage match network such that the bias current is shared to have low power consumption and RF signal is doubly amplified to have high gain and low noise figure. The implemented 0.18 mum CMOS LNA achieves 15.2 dB power gain and 3.0 dB noise figure, while only consuming 1.81 mW. Compared with previously published current-reused LNA, the proposed LNA has smallest chip size of 0.28 mm2, excluding the I/O pads, and the highest FOM of 2.77.
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