3伏技术中的5伏驱动输出缓冲器

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334) Pub Date : 1997-09-07 DOI:10.1109/ASIC.1997.617020

B. L. Morris

{"title":"3伏技术中的5伏驱动输出缓冲器","authors":"B. L. Morris","doi":"10.1109/ASIC.1997.617020","DOIUrl":null,"url":null,"abstract":"This paper describes an output buffer which is capable of producing a 5 volt output voltage in a 3 volt technology, without exceeding 3.6 volts across a gate or drain-to-source of any transistor in the circuit. The buffer requires a 5 volt supply in addition to the normal (3.3 volt) supply. This buffer has been manufactured in the Lucent Technologies 0.35 /spl mu/m 3 volt technology.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 5 volt drive output buffer in a 3 volt technology\",\"authors\":\"B. L. Morris\",\"doi\":\"10.1109/ASIC.1997.617020\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an output buffer which is capable of producing a 5 volt output voltage in a 3 volt technology, without exceeding 3.6 volts across a gate or drain-to-source of any transistor in the circuit. The buffer requires a 5 volt supply in addition to the normal (3.3 volt) supply. This buffer has been manufactured in the Lucent Technologies 0.35 /spl mu/m 3 volt technology.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.617020\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.617020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文描述了一种能够在3伏技术中产生5伏输出电压的输出缓冲器，在电路中任何晶体管的栅极或漏源端不超过3.6伏。除了正常(3.3伏)电源外，缓冲器还需要一个5伏的电源。该缓冲器采用朗讯技术0.35 /spl mu/m 3伏技术制造。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

A 5 volt drive output buffer in a 3 volt technology

This paper describes an output buffer which is capable of producing a 5 volt output voltage in a 3 volt technology, without exceeding 3.6 volts across a gate or drain-to-source of any transistor in the circuit. The buffer requires a 5 volt supply in addition to the normal (3.3 volt) supply. This buffer has been manufactured in the Lucent Technologies 0.35 /spl mu/m 3 volt technology.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)

自引率

0.00%

发文量

期刊最新文献

Low power optimization of bit-serial digital filters Applying functional decomposition for depth minimal technology mapping of multiplexer based FPGAs Layout verification to improve ESD/latchup immunity of scaled-down CMOS cell libraries A MAGFET sensor array for digital magnetic signal reading Low voltage and low power design of microwave mixer