MTCMOS设计方法及其在移动计算中的应用

H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong
{"title":"MTCMOS设计方法及其在移动计算中的应用","authors":"H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong","doi":"10.1145/871506.871536","DOIUrl":null,"url":null,"abstract":"The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"56","resultStr":"{\"title\":\"An MTCMOS design methodology and its application to mobile computing\",\"authors\":\"H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong\",\"doi\":\"10.1145/871506.871536\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.\",\"PeriodicalId\":355883,\"journal\":{\"name\":\"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-08-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"56\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/871506.871536\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/871506.871536","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 56

摘要

多阈值CMOS (MTCMOS)技术为满足现代设计对高性能、低功耗的要求提供了一种解决方案。而低V/sub /晶体管用于实现所需的功能,高V/sub /晶体管用于切断泄漏电流。在本文中,我们(i)研究了三星0.18 /spl mu/m工艺的MTCMOS技术的有效性,(ii)提出了一种新的特殊触发器,可以在睡眠模式下保持有效数据,(iii)开发了一种考虑到与MTCMOS技术相关的新设计问题的方法。为了验证所提出的技术,使用MTCMOS设计方法和0.18 /spl mu/m工艺实现了个人数字助理(PDA)处理器。所制备的PDA处理器工作频率为333mhz,泄漏功率约为2 /spl mu/W。虽然MTCMOS实现的性能与通用CMOS实现相同,但泄漏功率降低了三个数量级。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
An MTCMOS design methodology and its application to mobile computing
The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Voltage scheduling under unpredictabilities: a risk management paradigm [logic design] Uncertainty-based scheduling: energy-efficient ordering for tasks with variable execution time [processor scheduling] Level conversion for dual-supply systems [low power logic IC design] A selective filter-bank TLB system [embedded processor MMU for low power] A semi-custom voltage-island technique and its application to high-speed serial links [CMOS active power reduction]
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1