H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong
{"title":"MTCMOS设计方法及其在移动计算中的应用","authors":"H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong","doi":"10.1145/871506.871536","DOIUrl":null,"url":null,"abstract":"The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.","PeriodicalId":355883,"journal":{"name":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"56","resultStr":"{\"title\":\"An MTCMOS design methodology and its application to mobile computing\",\"authors\":\"H. Won, Kyorai Kim, Kwang-Ok Jeong, Ki-Tae Park, Kyu-Myung Choi, J. Kong\",\"doi\":\"10.1145/871506.871536\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.\",\"PeriodicalId\":355883,\"journal\":{\"name\":\"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-08-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"56\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/871506.871536\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003. ISLPED '03.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/871506.871536","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An MTCMOS design methodology and its application to mobile computing
The multi-threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low V/sub th/ transistors are used to implement the desired function, the high V/sub th/ transistors are used to cut off the leakage current. In this paper, we (i) examine the effectiveness of the MTCMOS technology for Samsung's 0.18 /spl mu/m process, (ii) propose a new special flip-flop which keeps valid data during the sleep mode, and (iii) develop a methodology which takes into account the new design issues related to the MTCMOS technology. Towards validating the proposed technique, a personal digital assistant (PDA) processor has been implemented using the MTCMOS design methodology, and the 0.18 /spl mu/m process. The fabricated PDA processor operates at 333 MHz, and consumes about 2 /spl mu/W of leakage power. Whereas the performance of the MTCMOS implementation is the same as that of the generic CMOS implementation, three orders of reduction in the leakage power has been achieved.