{"title":"基于帧的CMOS成像仪自适应","authors":"D. Climie, S. Chen, A. Bermak, D. Martinez","doi":"10.1109/ICICS.2005.1689055","DOIUrl":null,"url":null,"abstract":"This paper presents a VLSI architecture of a frame-based adaptive quantization technique based on the fast boundary adaptation rule (FBAR). The adaptive quantization algorithm is integrated together with a 128times128 pixel CMOS image sensor array. The pixel operation is based on biologically inspired time-to-first spike encoding scheme. System and circuit level simulations show the successful operation of the proposed architecture","PeriodicalId":425178,"journal":{"name":"2005 5th International Conference on Information Communications & Signal Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Frame Based Adaptation for CMOS Imager\",\"authors\":\"D. Climie, S. Chen, A. Bermak, D. Martinez\",\"doi\":\"10.1109/ICICS.2005.1689055\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a VLSI architecture of a frame-based adaptive quantization technique based on the fast boundary adaptation rule (FBAR). The adaptive quantization algorithm is integrated together with a 128times128 pixel CMOS image sensor array. The pixel operation is based on biologically inspired time-to-first spike encoding scheme. System and circuit level simulations show the successful operation of the proposed architecture\",\"PeriodicalId\":425178,\"journal\":{\"name\":\"2005 5th International Conference on Information Communications & Signal Processing\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 5th International Conference on Information Communications & Signal Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICS.2005.1689055\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 5th International Conference on Information Communications & Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICS.2005.1689055","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents a VLSI architecture of a frame-based adaptive quantization technique based on the fast boundary adaptation rule (FBAR). The adaptive quantization algorithm is integrated together with a 128times128 pixel CMOS image sensor array. The pixel operation is based on biologically inspired time-to-first spike encoding scheme. System and circuit level simulations show the successful operation of the proposed architecture