一种基于有源反馈网络的高增益低噪声跨阻放大器

E. Genco, Kyle van Oosterhout, Martijn Timmermans, M. Fattori
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摘要

在这项工作中,我们提出了一种具有超高跨阻增益的新型TIA,无需使用伪电阻或片外电阻即可实现。提出的方法克服了传统的电阻反馈TIA设计中噪声和增益之间的权衡。所提出的架构利用TIA负反馈路径中的transconductor来实现阻抗倍增并实现大的跨阻放大。此外,由于主导极位于TIA的输入端,当不同的容性负载连接到电路的输入端时,电路的稳定性可以与增益分离。仿真结果表明,当与输出电容为20pf的电流源耦合时,可以设计出具有5 M $\Omega$ (134.1 dB $\Omega$)至5 G $\Omega$ (194.4 dB $\Omega$)可编程跨阻增益的TIA,其3dB带宽分别为1.54 MHz和23 kHz。在20hz频率下,TIA的输入参考噪声电流分别为2fA/ $\sqrt{}$ Hz和20fa / $\sqrt{}$ Hz。分别为最大和最小增益。此外,可编程TIA在任何输入电容等于或大于20pf的情况下都具有无条件稳定性。该TIA在台积电65nm CMOS技术节点上实现,其面积为0.045 $\mu m^{2}$,功耗为850 $\mu$ W,电源为1.2 V。由于其高增益、大带宽、低噪声性能以及对输入源电容值的灵活性,所提出的解决方案最适合于连接高电容传感器或作为固态器件噪声性能表征的通用第一阶段。
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A High-Gain Low-Noise Transimpedance Amplifier based on Active-Feedback Network
In this work, we present a novel TIA with ultra-high transimpedance gain, achieved without the use of pseudo-resistors or off-chip resistors. The proposed approach overcomes the conventional trade-offs between noise and gain in the design of a TIA with resistive feedback. The proposed architecture makes use of a transconductor in the TIA negative feedback path to achieve impedance multiplication and enable large transimpedance amplification. Moreover, thanks to the dominant pole positioned at the input of the TIA, circuit stability can be disentangled from the gain when different capacitive loads are connected to the input of the circuit. Simulation results reveal that it is possible to design a TIA with programmable transimpedance gain ranging from 5 M$\Omega$ (134.1 dB$\Omega$) to 5 G$\Omega$(194.4 dB$\Omega$) and exhibiting a 3dB bandwidth of 1.54 MHz and 23 kHz, respectively when coupled to a current-source with an output capacitance of 20 pF. At the frequency of 20 Hz, the TIA achieves an input referred noise current of 2fA/$\sqrt{}$Hz and 20 fA/$\sqrt{}$Hz, for the maximum and minimum gain, respectively. Moreover, the programmable TIA is unconditionally stable by design for any input capacitance equal to or larger than 20 pF. The proposed TIA is implemented in a TSMC 65nm CMOS technology node, it requires an area of 0.045 $\mu m^{2}$ and consumes 850 $\mu$W at a power supply of 1.2 V. Thanks to its high-gain, large bandwidth, low-noise performance and its flexibility with the respect to the input source capacitance value, the proposed solution is best suited for the interfacing highly capacitive sensors or as a versatile first stage for the noise performance characterization of solid-state devices.
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