{"title":"用于高频、高效率计算电源应用的增强型屏蔽栅沟槽mosfet","authors":"T. Sarkar, A. Challa, S. Sapp","doi":"10.1109/APEC.2013.6520257","DOIUrl":null,"url":null,"abstract":"Shielded-gate trench-MOSFETs yield superior performance compared to conventional gate trench devices by allowing higher doping density in the drift region and providing a `shielding effect' for the gate by placing an intermediate electrode between gate and drain. However, further design optimizations can be done for a shielded-gate trench-MOSFET to improve performance parameters particularly suited for next-generation high-frequency computing power supply applications and they have been outlined in this article. Channel length and threshold voltage optimization, substrate thinning and intrinsic gate resistance reduction (by layout enhancements) have been discussed along with their impact on device footprint reduction. Further, effects of these design optimizations on the power loss and efficiency of a high-frequency switching converter have been demonstrated through experimental characterizations.","PeriodicalId":256756,"journal":{"name":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Enhanced shielded-gate trench MOSFETs for high-frequency, high-efficiency computing power supply applications\",\"authors\":\"T. Sarkar, A. Challa, S. Sapp\",\"doi\":\"10.1109/APEC.2013.6520257\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Shielded-gate trench-MOSFETs yield superior performance compared to conventional gate trench devices by allowing higher doping density in the drift region and providing a `shielding effect' for the gate by placing an intermediate electrode between gate and drain. However, further design optimizations can be done for a shielded-gate trench-MOSFET to improve performance parameters particularly suited for next-generation high-frequency computing power supply applications and they have been outlined in this article. Channel length and threshold voltage optimization, substrate thinning and intrinsic gate resistance reduction (by layout enhancements) have been discussed along with their impact on device footprint reduction. Further, effects of these design optimizations on the power loss and efficiency of a high-frequency switching converter have been demonstrated through experimental characterizations.\",\"PeriodicalId\":256756,\"journal\":{\"name\":\"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":\"34 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC.2013.6520257\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Twenty-Eighth Annual IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC.2013.6520257","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enhanced shielded-gate trench MOSFETs for high-frequency, high-efficiency computing power supply applications
Shielded-gate trench-MOSFETs yield superior performance compared to conventional gate trench devices by allowing higher doping density in the drift region and providing a `shielding effect' for the gate by placing an intermediate electrode between gate and drain. However, further design optimizations can be done for a shielded-gate trench-MOSFET to improve performance parameters particularly suited for next-generation high-frequency computing power supply applications and they have been outlined in this article. Channel length and threshold voltage optimization, substrate thinning and intrinsic gate resistance reduction (by layout enhancements) have been discussed along with their impact on device footprint reduction. Further, effects of these design optimizations on the power loss and efficiency of a high-frequency switching converter have been demonstrated through experimental characterizations.