{"title":"高频双极- JFET - I2L工艺","authors":"S. Lui, R. Meyer","doi":"10.1109/IEDM.1980.189844","DOIUrl":null,"url":null,"abstract":"A new monolithic process is described which allows simultaneous fabrication of high-speed (f<inf>T</inf>=400 MHz) JFETs, high-frequency (f<inf>T</inf>=4 GHz) bi-polar transistors plus I<sup>2</sup>L logic (t<inf>d</inf>=14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High frequency bipolar - JFET - I2L process\",\"authors\":\"S. Lui, R. Meyer\",\"doi\":\"10.1109/IEDM.1980.189844\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new monolithic process is described which allows simultaneous fabrication of high-speed (f<inf>T</inf>=400 MHz) JFETs, high-frequency (f<inf>T</inf>=4 GHz) bi-polar transistors plus I<sup>2</sup>L logic (t<inf>d</inf>=14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.\",\"PeriodicalId\":180541,\"journal\":{\"name\":\"1980 International Electron Devices Meeting\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.1980.189844\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1980.189844","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new monolithic process is described which allows simultaneous fabrication of high-speed (fT=400 MHz) JFETs, high-frequency (fT=4 GHz) bi-polar transistors plus I2L logic (td=14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.
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