41相开关电容功率变换器，输出纹波3.8mV，效率81%

2012 IEEE International Solid-State Circuits Conference Pub Date : 2012-04-03 DOI:10.1109/ISSCC.2012.6176892

Gerard Villar Pique

{"title":"41相开关电容功率变换器，输出纹波3.8mV，效率81%","authors":"Gerard Villar Pique","doi":"10.1109/ISSCC.2012.6176892","DOIUrl":null,"url":null,"abstract":"This work presents a switched-capacitor power converter (SCPC) with a power density of 38.6mW/mm2 at 81% efficiency and 3.8mV output voltage ripple (ΔV0) in baseline 90nm CMOS. The design implements two different conversion ratios to maximize efficiency for a wide range of input voltages, and the use of 41 phases results in a very low output voltage ripple and low input current spikes.","PeriodicalId":255282,"journal":{"name":"2012 IEEE International Solid-State Circuits Conference","volume":"75 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"73","resultStr":"{\"title\":\"A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS\",\"authors\":\"Gerard Villar Pique\",\"doi\":\"10.1109/ISSCC.2012.6176892\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a switched-capacitor power converter (SCPC) with a power density of 38.6mW/mm2 at 81% efficiency and 3.8mV output voltage ripple (ΔV0) in baseline 90nm CMOS. The design implements two different conversion ratios to maximize efficiency for a wide range of input voltages, and the use of 41 phases results in a very low output voltage ripple and low input current spikes.\",\"PeriodicalId\":255282,\"journal\":{\"name\":\"2012 IEEE International Solid-State Circuits Conference\",\"volume\":\"75 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-04-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"73\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2012.6176892\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2012.6176892","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 73

摘要

本研究提出了一种开关电容功率转换器(SCPC)，其功率密度为38.6mW/mm2，效率为81%，输出电压纹波为3.8mV (ΔV0)。该设计实现了两种不同的转换比率，以在宽范围的输入电压下最大限度地提高效率，并且使用41相导致非常低的输出电压纹波和低输入电流尖峰。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS

This work presents a switched-capacitor power converter (SCPC) with a power density of 38.6mW/mm2 at 81% efficiency and 3.8mV output voltage ripple (ΔV0) in baseline 90nm CMOS. The design implements two different conversion ratios to maximize efficiency for a wide range of input voltages, and the use of 41 phases results in a very low output voltage ripple and low input current spikes.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2012 IEEE International Solid-State Circuits Conference

自引率

0.00%

发文量