Ryo Umesao, J. Ida, K. Kawabata, Sou Tashino, K. Noguchi, K. Itoh
{"title":"基于SOI的栅极控制二极管用于射频能量收集的高效整流","authors":"Ryo Umesao, J. Ida, K. Kawabata, Sou Tashino, K. Noguchi, K. Itoh","doi":"10.1109/WPT.2013.6556889","DOIUrl":null,"url":null,"abstract":"For realization of the RF energy harvesting of the ultra low power RF input, the gate controlled diodes (GCD) which can achieve the near zero turn-on voltage were compared with the conventional PN-diode's (PND) and the Schottky Barrier Diode's (SBD). The results of the measurement and the theoretical calculations show that the on-resistance of the GCD could be less than the PND's and also the SBD's, when compared with the same area. It is due to the scaling of MOS. The mechanism of the leakage current of the GCD was analysed from the measurements. It is found that the gate induced drain leakage (GIDL) and the diffusion current are contributed to the leakage current of the GCD. Therefore, it is pointed out that the thickness of the gate oxide and the threshold voltage (Vt) of MOS should be optimized, in order to reduce the leakage of the GCD. From examination of the curvature coefficient γ which represents the efficiency of rectification, it was found for the first time that the γ of the SOI_GCD with the optimum gate oxide thickness and the Vt exceeds the γ of the PND's and the SBD's. The SOI_GCD was also found to be excellent at the product of RsC0 which the C0 affects the efficiency of rectification, especially at the high frequency. Thus, the most desirable device for the RF energy harvesting will be obtained by optimizing the gate oxide thickness and the Vt of the SOI_GCD.","PeriodicalId":143468,"journal":{"name":"2013 IEEE Wireless Power Transfer (WPT)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"High efficiency rectification by SOI based gate controlled diode for RF energy harvesting\",\"authors\":\"Ryo Umesao, J. Ida, K. Kawabata, Sou Tashino, K. Noguchi, K. Itoh\",\"doi\":\"10.1109/WPT.2013.6556889\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For realization of the RF energy harvesting of the ultra low power RF input, the gate controlled diodes (GCD) which can achieve the near zero turn-on voltage were compared with the conventional PN-diode's (PND) and the Schottky Barrier Diode's (SBD). The results of the measurement and the theoretical calculations show that the on-resistance of the GCD could be less than the PND's and also the SBD's, when compared with the same area. It is due to the scaling of MOS. The mechanism of the leakage current of the GCD was analysed from the measurements. It is found that the gate induced drain leakage (GIDL) and the diffusion current are contributed to the leakage current of the GCD. Therefore, it is pointed out that the thickness of the gate oxide and the threshold voltage (Vt) of MOS should be optimized, in order to reduce the leakage of the GCD. From examination of the curvature coefficient γ which represents the efficiency of rectification, it was found for the first time that the γ of the SOI_GCD with the optimum gate oxide thickness and the Vt exceeds the γ of the PND's and the SBD's. The SOI_GCD was also found to be excellent at the product of RsC0 which the C0 affects the efficiency of rectification, especially at the high frequency. Thus, the most desirable device for the RF energy harvesting will be obtained by optimizing the gate oxide thickness and the Vt of the SOI_GCD.\",\"PeriodicalId\":143468,\"journal\":{\"name\":\"2013 IEEE Wireless Power Transfer (WPT)\",\"volume\":\"85 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Wireless Power Transfer (WPT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WPT.2013.6556889\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Wireless Power Transfer (WPT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WPT.2013.6556889","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High efficiency rectification by SOI based gate controlled diode for RF energy harvesting
For realization of the RF energy harvesting of the ultra low power RF input, the gate controlled diodes (GCD) which can achieve the near zero turn-on voltage were compared with the conventional PN-diode's (PND) and the Schottky Barrier Diode's (SBD). The results of the measurement and the theoretical calculations show that the on-resistance of the GCD could be less than the PND's and also the SBD's, when compared with the same area. It is due to the scaling of MOS. The mechanism of the leakage current of the GCD was analysed from the measurements. It is found that the gate induced drain leakage (GIDL) and the diffusion current are contributed to the leakage current of the GCD. Therefore, it is pointed out that the thickness of the gate oxide and the threshold voltage (Vt) of MOS should be optimized, in order to reduce the leakage of the GCD. From examination of the curvature coefficient γ which represents the efficiency of rectification, it was found for the first time that the γ of the SOI_GCD with the optimum gate oxide thickness and the Vt exceeds the γ of the PND's and the SBD's. The SOI_GCD was also found to be excellent at the product of RsC0 which the C0 affects the efficiency of rectification, especially at the high frequency. Thus, the most desirable device for the RF energy harvesting will be obtained by optimizing the gate oxide thickness and the Vt of the SOI_GCD.