Active Disturbance Rejection Controller with Virtual Impedance-based Current Limiter for Voltage Regulation of DC/DC Converters

In this paper we integrate a virtual impedance-based current limiter (VICL) in the active disturbance rejection control (ADRC) employed for the voltage regulation of buck converters in MTDC systems. The ADRC voltage controller consists of a linear quadratic Gaussian (LQG) structure with reference trajectory generator. Small-signal stability analysis and time-domain simulations investigate the performance of this ADRC+VICL model. The VICL manages to limit the over-current of the converter without affecting the stability of the system. The converter achieves to exit the overcurrent limiting mode and enter the voltage control mode smoothly. The ADRC mitigates the interactions between different components in the system and stabilises it, thanks to the virtual disturbance, which represents the actual dynamics at the converter terminals. The beneficial performance characteristics of the ADRC+VICL model are also demonstrated through real-time simulations results.