Tang-Nian Luo, Shuen-Yin Bai, Y. Chen, Chun-Lin Ko, Chin-Fong Chiu, Y. Juang
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This paper presents a 43 GHz divide-by-three prescaler implemented in 0.13 mum CMOS technology. The variation of regenerative topology is used to perform frequency division by three at millimeter-wave frequency. The band-pass filtering is developed with circuit parasitics to suppress unwanted harmonics. By combining the Gilbert-cell mixer and differential injection locked oscillator, the maximum operating frequency of the CMOS divide-by-three prescaler is elevated to 43 GHz. The measured phase noise is -108.8 dBc/Hz at 1 MHz offset from the output signal frequency. Operated at 2 V, the prescaler consumes 16 mW of power. The total chip size is 0.8times0.6 mm2.
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