Analysis and approximation of SAO estimation for CTU-level HEVC encoder

In the HEVC standardization process & HM test model implementation, it's been indicated that SAO operation can be executed only at frame level. But for the purpose of low-latency, better memory-bandwidth efficiency and cache performance, it is needed to implement SAO filter at CTU level, along with other encode modules, for majority applications. As well, if any ASIC to be developed for HEVC, all modules are very much expected to execute at CTU/CU level for better pipeline performance. In this paper, we present two methods to carry out SAO offset estimation at CTU level. The proposed two methods are very suitable for the realization in pipe-lined architectures including both software and hardware solutions. Our experimentation results demonstrate that, the proposed two methods produce similar results as SAO frame level results, for both video quality & bit-rate by improving the memory bandwidth and cache performance efficiency.