Stress Analysis of Transistor Structures Considering the Internal Stress of Thin Films

Stress fields in transistor structures are analyzed with consideration of the internal stresses of thin films. Internal stresses of amorphous silicon and tungsten silicide films are measured by detecting changes in the surface curvature of film-covered substrates as a function of temperature. Internal stresses of both films change upon annealing due to phase transitions, and reach about 1000 MPa. The stress predicted for transistor structures without considering the internal stress of the films differs markedly from results obtained using microscopic Raman spectroscopy. On the other hand, the stress predicted with consideration of film internal stress agrees very well with measured data. Stress design is performed for an actual transistor structure by adjusting the annealing temperature depending on the internal stress of an amorphous silicon thin film to eliminate the generation of dislocations. It is confirmed that stress design is effective in eliminating dislocations in transistor structures, thus improving device reliability.