J. Kawashima, H. Ochi, Hiroshi Tsutsui, Takashi Sato
{"title":"考虑能量最小化和产量最大化的亚阈值电路设计策略","authors":"J. Kawashima, H. Ochi, Hiroshi Tsutsui, Takashi Sato","doi":"10.1109/SOCC.2011.6085076","DOIUrl":null,"url":null,"abstract":"This paper investigates a design strategy for sub-threshold circuits focusing on energy-consumption minimization and yield maximization under process variations. It is shown that 1) the minimum operation voltage (VDDmin) of a circuit is dominated by FFs, and it can be improved by appropriate transistor sizing, 2) VDDmin of a FF is stochastically modeled by a log-normal distribution, 3) VDDmin of a large circuit can be estimated using the above model without extensive Monte-Carlo simulations, and 4) improving VDDmin may substantially contribute to reduce energy consumption.","PeriodicalId":365422,"journal":{"name":"2011 IEEE International SOC Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A design strategy for sub-threshold circuits considering energy-minimization and yield-maximization\",\"authors\":\"J. Kawashima, H. Ochi, Hiroshi Tsutsui, Takashi Sato\",\"doi\":\"10.1109/SOCC.2011.6085076\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates a design strategy for sub-threshold circuits focusing on energy-consumption minimization and yield maximization under process variations. It is shown that 1) the minimum operation voltage (VDDmin) of a circuit is dominated by FFs, and it can be improved by appropriate transistor sizing, 2) VDDmin of a FF is stochastically modeled by a log-normal distribution, 3) VDDmin of a large circuit can be estimated using the above model without extensive Monte-Carlo simulations, and 4) improving VDDmin may substantially contribute to reduce energy consumption.\",\"PeriodicalId\":365422,\"journal\":{\"name\":\"2011 IEEE International SOC Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2011.6085076\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2011.6085076","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design strategy for sub-threshold circuits considering energy-minimization and yield-maximization
This paper investigates a design strategy for sub-threshold circuits focusing on energy-consumption minimization and yield maximization under process variations. It is shown that 1) the minimum operation voltage (VDDmin) of a circuit is dominated by FFs, and it can be improved by appropriate transistor sizing, 2) VDDmin of a FF is stochastically modeled by a log-normal distribution, 3) VDDmin of a large circuit can be estimated using the above model without extensive Monte-Carlo simulations, and 4) improving VDDmin may substantially contribute to reduce energy consumption.