{"title":"用华莱士树编码器实现低功耗温度计码到数字转换器的VLSI","authors":"S. Karunakaran, K. D. Kumar, Kovuri Radha Kishor","doi":"10.1109/ICPC2T53885.2022.9777054","DOIUrl":null,"url":null,"abstract":"The VLSI architecture for a high-performance Low power thermometer code to digital converter using Wallace tree encoder is proposed in this research. When transforming code of thermometer type to binary type, WTE is utilised (analog to digital conversion). This is a type of flash ADC with an encoder, group of resistors and a comparator circuit, and it is a high-speed application. To obtain binary code from the comparator's output, an approximate encoder is necessary. The encoder's energy consumption is a crucial problem when constructing a low-power flash type of ADC. Wallace tree encoders decrease mistakes caused by the presence of zeroes in a succession of ones presence to a sequence of zeroes at a comparator output, but they consume excess power. A low-power WTE is constructed using a PTL full adder to overcome the issue of excessive power consumption. The proposed device uses only 616.4nW of electricity and has a 57.13-second delay. CADENCE 5.1.0 EDA is used to design the circuit and simulated using spectre virtuoso.","PeriodicalId":283298,"journal":{"name":"2022 Second International Conference on Power, Control and Computing Technologies (ICPC2T)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"VLSI Implementation of Low Power Thermometer Code to Digital Converter Using Wallace Tree Encoder\",\"authors\":\"S. Karunakaran, K. D. Kumar, Kovuri Radha Kishor\",\"doi\":\"10.1109/ICPC2T53885.2022.9777054\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The VLSI architecture for a high-performance Low power thermometer code to digital converter using Wallace tree encoder is proposed in this research. When transforming code of thermometer type to binary type, WTE is utilised (analog to digital conversion). This is a type of flash ADC with an encoder, group of resistors and a comparator circuit, and it is a high-speed application. To obtain binary code from the comparator's output, an approximate encoder is necessary. The encoder's energy consumption is a crucial problem when constructing a low-power flash type of ADC. Wallace tree encoders decrease mistakes caused by the presence of zeroes in a succession of ones presence to a sequence of zeroes at a comparator output, but they consume excess power. A low-power WTE is constructed using a PTL full adder to overcome the issue of excessive power consumption. The proposed device uses only 616.4nW of electricity and has a 57.13-second delay. CADENCE 5.1.0 EDA is used to design the circuit and simulated using spectre virtuoso.\",\"PeriodicalId\":283298,\"journal\":{\"name\":\"2022 Second International Conference on Power, Control and Computing Technologies (ICPC2T)\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 Second International Conference on Power, Control and Computing Technologies (ICPC2T)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICPC2T53885.2022.9777054\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Second International Conference on Power, Control and Computing Technologies (ICPC2T)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICPC2T53885.2022.9777054","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
VLSI Implementation of Low Power Thermometer Code to Digital Converter Using Wallace Tree Encoder
The VLSI architecture for a high-performance Low power thermometer code to digital converter using Wallace tree encoder is proposed in this research. When transforming code of thermometer type to binary type, WTE is utilised (analog to digital conversion). This is a type of flash ADC with an encoder, group of resistors and a comparator circuit, and it is a high-speed application. To obtain binary code from the comparator's output, an approximate encoder is necessary. The encoder's energy consumption is a crucial problem when constructing a low-power flash type of ADC. Wallace tree encoders decrease mistakes caused by the presence of zeroes in a succession of ones presence to a sequence of zeroes at a comparator output, but they consume excess power. A low-power WTE is constructed using a PTL full adder to overcome the issue of excessive power consumption. The proposed device uses only 616.4nW of electricity and has a 57.13-second delay. CADENCE 5.1.0 EDA is used to design the circuit and simulated using spectre virtuoso.