单比特接收机专用集成电路设计

D. Pok, C.-i.H. Chen, C. Montgomery, B. Tsui, J. Schamus
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引用次数: 2

摘要

介绍了单比特接收机专用集成电路(ASIC)的设计。单比特接收机是一种宽带(1ghz)数字接收机,设计用于电子战应用。该接收器可以同时处理两个信号,并且具有在单个多芯片模块(MCM)上制造的潜力。该接收器由三个主要部分组成:(1)非线性射频(RF)前端,(2)信号采样器和格式化系统(模数转换器(ADC)和解复用器),以及(3)作为信号检测和频率测量的ASIC实现的专利“单比特”算法。给出了接收机前端、ADC和算法的实验性能结果。接收器使用工作频率为2.5 GHz的2位ADC,其输出由解复用器收集并格式化,以呈现给ASIC。ASIC有两个基本功能:(1)执行快速傅立叶变换(FFT)和(2)确定信号的数量并报告其频率。ASIC设计包含五个阶段:(1)输入,(2)FFT,(3)初始排序,(4)平方和加法,(5)最终排序。芯片将实时处理ADC输出,每102.4 ns报告检测到的信号频率。
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ASIC design for monobit receiver
A design for the monobit receiver application specific integrated circuit (ASIC) is described. The monobit receiver is a wide band (1 GHz) digital receiver designed for electronic warfare applications. The receiver can process two simultaneous signals and has the potential for fabrication on a single multi-chip module (MCM). The receiver consists of three major elements: (1) a nonlinear radio frequency (RF) front-end, (2) a signal sampler and formatting system (analog-to-digital converter (ADC) and demultiplexers), and (3) a patented "monobit" algorithm implemented as an ASIC for signal detection and frequency measurement. The receiver's front end, ADC and algorithm experimental performance results will be presented. The receiver uses a two-bit ADC operating at 2.5 GHz whose outputs are collected and formatted by demultiplexers for presentation to the ASIC. The ASIC has two basic functions: (1) perform a fast Fourier transform (FFT) and (2) determine the number of signals and report their frequencies. The ASIC design contains five stages: (1) the input, (2) the FFT, (3) the initial sort, (4) the squaring and addition, and (5) the final sort. The chip will process the ADC outputs in real time, reporting detected signal frequencies every 102.4 ns.
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