On Implementation Aspects of Standard Asymmetric and Symmetric Cryptographic Algorithms on TI Signal Processors

In this work, possible optimization techniques for realization of asymmetrical and symmetrical standard cryptographic algorithms on assembler of Texas Instruments TMS320C54x family of digital signal processors are considered. Optimization of RSA asymmetrical, as well as IDEA and AES (Rijndael) symmetrical algorithms are evaluated. Possible optimization techniques for RSA algorithm are related to multiplication, modular reduction and RSA private key operation procedures. We have modified the original Karatsuba-Offman's algorithm and obtain a less recursive algorithm and use it for possible optimization. A cryptographic throughput and a speed of the signal processor's realization of IDEA and AES symmetrical algorithms in ECB mode are also analyzed. Besides, an optimization procedure in AES algorithm using specific tables is also discussed. Obtained results show that the TMS320C54x family of signal processors is suitable for the standard asymmetrical and symmetrical algorithms' realization