带运放像素放大器的红外焦平面阵列CMOS读出集成电路

J.J. Niewiadomski, B. Carlson
{"title":"带运放像素放大器的红外焦平面阵列CMOS读出集成电路","authors":"J.J. Niewiadomski, B. Carlson","doi":"10.1109/ASIC.1997.616980","DOIUrl":null,"url":null,"abstract":"The design and prototype of a read-out integrated circuit for an uncooled infrared focal plane array are described in this paper. The device is designed to interface to a pyroelectric infrared detector array of size 320/spl times/240. The read-out IC presented here achieves better performance and uniformity compared to existing approaches by implementing a single stage CMOS op-amp within each pixel of the detector array. The prototype devices exhibit fixed pattern noise less than 5 mv (0.5% of full scale) without correction. The pixel amplifier exhibits less than 0.6% maximum (0.5% average) relative gain error with less than 0.2% gain variation over the 1 V input range.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"CMOS read-out IC with op-amp pixel amplifier for infrared focal plane arrays\",\"authors\":\"J.J. Niewiadomski, B. Carlson\",\"doi\":\"10.1109/ASIC.1997.616980\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and prototype of a read-out integrated circuit for an uncooled infrared focal plane array are described in this paper. The device is designed to interface to a pyroelectric infrared detector array of size 320/spl times/240. The read-out IC presented here achieves better performance and uniformity compared to existing approaches by implementing a single stage CMOS op-amp within each pixel of the detector array. The prototype devices exhibit fixed pattern noise less than 5 mv (0.5% of full scale) without correction. The pixel amplifier exhibits less than 0.6% maximum (0.5% average) relative gain error with less than 0.2% gain variation over the 1 V input range.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.616980\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616980","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

本文介绍了一种非制冷红外焦平面阵列读出集成电路的设计和样机。该器件设计用于连接尺寸为320/spl倍/240的热释电红外探测器阵列。本文提出的读出IC通过在探测器阵列的每个像素内实现单级CMOS运算放大器,与现有方法相比,实现了更好的性能和均匀性。原型器件在没有校正的情况下显示出小于5 mv(满量程的0.5%)的固定模式噪声。在1 V输入范围内,像素放大器的相对增益误差最大小于0.6%(平均小于0.5%),增益变化小于0.2%。
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CMOS read-out IC with op-amp pixel amplifier for infrared focal plane arrays
The design and prototype of a read-out integrated circuit for an uncooled infrared focal plane array are described in this paper. The device is designed to interface to a pyroelectric infrared detector array of size 320/spl times/240. The read-out IC presented here achieves better performance and uniformity compared to existing approaches by implementing a single stage CMOS op-amp within each pixel of the detector array. The prototype devices exhibit fixed pattern noise less than 5 mv (0.5% of full scale) without correction. The pixel amplifier exhibits less than 0.6% maximum (0.5% average) relative gain error with less than 0.2% gain variation over the 1 V input range.
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