嵌入式CMOS 3.3 V 16位单位和多位δ - σ数模转换器

M. Comminges, F. Dell'ova, F. Paillardet, E. André, M. Arndt, F. Balestro
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引用次数: 0

摘要

采用3.3 V、0.5 /spl mu/m全CMOS技术,开发了一种可嵌入的16位数模过采样转换器。它使用一个“131+46”或“27+7+5”抽头抗混叠滤波器和一个三阶单位或二阶多比特δ - σ调制器,然后是一个二阶开关电容滤波器。这个单元被设计成音频产品芯片的一部分,如CD或MPEG解码器系统。
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Embeddable CMOS 3.3 V 16 bits monobit and multibit delta-sigma digital to analog converter
An embeddable 16 bits digital to analog oversampled converter was developed in 3.3 V, 0.5 /spl mu/m full CMOS technology. It uses a "131+46" or "27+7+5" taps anti-aliasing filter and a third order monobit or second order multibit delta-sigma modulator followed by a second order switch-capacitor filter. This cell was designed to be a part of audio products chips like CD or MPEG decoder systems.
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