Zhenglin Liu, Qingchun Zhu, Wenjie Huo, X. Zou, Lian Huai
{"title":"MGT:嵌入式处理器的多粒度内存散列机制","authors":"Zhenglin Liu, Qingchun Zhu, Wenjie Huo, X. Zou, Lian Huai","doi":"10.1109/ICSAI.2012.6223593","DOIUrl":null,"url":null,"abstract":"Memory integrity verification has been widely used to protect off-chip memory from the tamper attacks. In this paper, we propose a new hash mechanism, multi-grained hash tree (MGT), to optimize the run-time performance of memory integrity verification. This new scheme adopts variable granularities to hash the nodes on different levels, and caches these nodes in a split hash cache. The experimental results indicate that our new multi-grained scheme has 10.8% performance speedup even with a small hash cache, and reduces 53.69% initialization latency on average.","PeriodicalId":164945,"journal":{"name":"2012 International Conference on Systems and Informatics (ICSAI2012)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"MGT: A multi-grained memory hash mechanism for embedded processor\",\"authors\":\"Zhenglin Liu, Qingchun Zhu, Wenjie Huo, X. Zou, Lian Huai\",\"doi\":\"10.1109/ICSAI.2012.6223593\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Memory integrity verification has been widely used to protect off-chip memory from the tamper attacks. In this paper, we propose a new hash mechanism, multi-grained hash tree (MGT), to optimize the run-time performance of memory integrity verification. This new scheme adopts variable granularities to hash the nodes on different levels, and caches these nodes in a split hash cache. The experimental results indicate that our new multi-grained scheme has 10.8% performance speedup even with a small hash cache, and reduces 53.69% initialization latency on average.\",\"PeriodicalId\":164945,\"journal\":{\"name\":\"2012 International Conference on Systems and Informatics (ICSAI2012)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-05-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Conference on Systems and Informatics (ICSAI2012)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSAI.2012.6223593\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Systems and Informatics (ICSAI2012)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSAI.2012.6223593","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
MGT: A multi-grained memory hash mechanism for embedded processor
Memory integrity verification has been widely used to protect off-chip memory from the tamper attacks. In this paper, we propose a new hash mechanism, multi-grained hash tree (MGT), to optimize the run-time performance of memory integrity verification. This new scheme adopts variable granularities to hash the nodes on different levels, and caches these nodes in a split hash cache. The experimental results indicate that our new multi-grained scheme has 10.8% performance speedup even with a small hash cache, and reduces 53.69% initialization latency on average.