{"title":"基于De Bruijn图的特定应用VLSI架构","authors":"D. Pradhan","doi":"10.1109/ASAP.1990.145498","DOIUrl":null,"url":null,"abstract":"The author provides an overview of various key features of De Bruijn graph-based VLSI architectures. The advantages of De Bruijn architectures over such other architectures as cube and shuffle-exchange are discussed. Important differences between De Bruijn interconnects and others are also described. The evolution of the De Bruijn interconnect is described. The FFT architecture and the Viterbi decoder for convolutional codes are examined in detail. The issues of routing and fault tolerance are addressed.<<ETX>>","PeriodicalId":438078,"journal":{"name":"[1990] Proceedings of the International Conference on Application Specific Array Processors","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-09-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Application specific VLSI architectures based on De Bruijn graphs\",\"authors\":\"D. Pradhan\",\"doi\":\"10.1109/ASAP.1990.145498\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author provides an overview of various key features of De Bruijn graph-based VLSI architectures. The advantages of De Bruijn architectures over such other architectures as cube and shuffle-exchange are discussed. Important differences between De Bruijn interconnects and others are also described. The evolution of the De Bruijn interconnect is described. The FFT architecture and the Viterbi decoder for convolutional codes are examined in detail. The issues of routing and fault tolerance are addressed.<<ETX>>\",\"PeriodicalId\":438078,\"journal\":{\"name\":\"[1990] Proceedings of the International Conference on Application Specific Array Processors\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-09-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1990] Proceedings of the International Conference on Application Specific Array Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASAP.1990.145498\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1990] Proceedings of the International Conference on Application Specific Array Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.1990.145498","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Application specific VLSI architectures based on De Bruijn graphs
The author provides an overview of various key features of De Bruijn graph-based VLSI architectures. The advantages of De Bruijn architectures over such other architectures as cube and shuffle-exchange are discussed. Important differences between De Bruijn interconnects and others are also described. The evolution of the De Bruijn interconnect is described. The FFT architecture and the Viterbi decoder for convolutional codes are examined in detail. The issues of routing and fault tolerance are addressed.<>