M. Muhamad, N. Soin, H. Ramiah, N. Noh, C. W. Keat
{"title":"2.14GHz的0.13µm电感退化级联CMOS LNA","authors":"M. Muhamad, N. Soin, H. Ramiah, N. Noh, C. W. Keat","doi":"10.1109/ISIEA.2011.6108680","DOIUrl":null,"url":null,"abstract":"A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is −19 dB.","PeriodicalId":110449,"journal":{"name":"2011 IEEE Symposium on Industrial Electronics and Applications","volume":"132 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 0.13µm inductively degenerated cascode CMOS LNA at 2.14GHz\",\"authors\":\"M. Muhamad, N. Soin, H. Ramiah, N. Noh, C. W. Keat\",\"doi\":\"10.1109/ISIEA.2011.6108680\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is −19 dB.\",\"PeriodicalId\":110449,\"journal\":{\"name\":\"2011 IEEE Symposium on Industrial Electronics and Applications\",\"volume\":\"132 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE Symposium on Industrial Electronics and Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISIEA.2011.6108680\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Symposium on Industrial Electronics and Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIEA.2011.6108680","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 0.13µm inductively degenerated cascode CMOS LNA at 2.14GHz
A 130-nm CMOS low-noise amplifier (LNA) for WCDMA applications is presented. The circuit adopts an inductively degenerated cascode topology. A detailed methodology using power constraint noise optimization (PCNO) method that leads to an optimum width of the LNA is presented. A theoretical noise figure optimization using fixed power was used as a design optimization guide. This inductively degenerated cascade topology show good noise performance which it achieve a noise figure of 1.32dB while provides a forward gain, S21 of 18.24 dB from a 1.2V voltage supply. The input reflection coefficient, S11 is −19 dB.