硬件软件系统中时序性功能错误的测试模式生成

Sixth IEEE International High-Level Design Validation and Test Workshop Pub Date : 2001-12-07 DOI:10.1109/HLDVT.2001.972812

Srikanth Arekapudi, Fei Xin, Jinzheng Peng, I. Harris

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引用次数: 4

摘要

提出了一种用于软硬件系统协同验证的ATPG算法。具体来说，我们的目标是通过使用我们提出的设计故障模型来检测设计中由时间引起的功能错误。测试生成过程所需的计算时间足够低，因此设计人员可以使用ATPG工具来显著降低验证成本。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Test pattern generation for timing-induced functional errors in hardware-software systems

We present an ATPG algorithm for the covalidation of hardware-software systems. Specifically, we target the detection of timing-induced functional errors in the design by using a design fault model which we propose. The computational time required by the test generation process is sufficiently low that the ATPG tool can be used by a designer to achieve a significant reduction in validation cost.

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Sixth IEEE International High-Level Design Validation and Test Workshop

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