{"title":"并行架构中负载均衡的仿真","authors":"Varsha Thakur, Sanjay Kumar","doi":"10.1109/CSNT.2017.8418521","DOIUrl":null,"url":null,"abstract":"Parallel architecture materialized as a research area with the prospective of furnishing faster results. In a parallel architecture, balancing of load over engaged cores or nodes is a critical issue. Imbalance in cores or processors degrades the performance of systems. This paper presents a study and simulation anatomy of some load balancing approaches on a parallel architecture. The performances are analyzed on the basis of execution time, speedup, throughput, and efficiency.","PeriodicalId":382417,"journal":{"name":"2017 7th International Conference on Communication Systems and Network Technologies (CSNT)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Simulation of load balancing in parallel architecture\",\"authors\":\"Varsha Thakur, Sanjay Kumar\",\"doi\":\"10.1109/CSNT.2017.8418521\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Parallel architecture materialized as a research area with the prospective of furnishing faster results. In a parallel architecture, balancing of load over engaged cores or nodes is a critical issue. Imbalance in cores or processors degrades the performance of systems. This paper presents a study and simulation anatomy of some load balancing approaches on a parallel architecture. The performances are analyzed on the basis of execution time, speedup, throughput, and efficiency.\",\"PeriodicalId\":382417,\"journal\":{\"name\":\"2017 7th International Conference on Communication Systems and Network Technologies (CSNT)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 7th International Conference on Communication Systems and Network Technologies (CSNT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSNT.2017.8418521\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 7th International Conference on Communication Systems and Network Technologies (CSNT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSNT.2017.8418521","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simulation of load balancing in parallel architecture
Parallel architecture materialized as a research area with the prospective of furnishing faster results. In a parallel architecture, balancing of load over engaged cores or nodes is a critical issue. Imbalance in cores or processors degrades the performance of systems. This paper presents a study and simulation anatomy of some load balancing approaches on a parallel architecture. The performances are analyzed on the basis of execution time, speedup, throughput, and efficiency.
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