{"title":"基于可达性驱动的网络排序的同时逃逸路由","authors":"Jin-Tai Yan, Tung-Yen Sung, Zhi-Wei Chen","doi":"10.1109/SOCC.2011.6085100","DOIUrl":null,"url":null,"abstract":"In this paper, given a set of n escape nets between an array of pxq pins and an array of rxs pins, firstly, a routability-driven net order between two given pin arrays is determined for simultaneous escape routing. Furthermore, based on ordered escape routing for two pin arrays, an efficient approach is proposed to solve the routing problem for simultaneous escape routing. Compared with Kong's flow-based approach [11] for three tested examples, the experimental results show that our proposed approach achieves 100% routability for the tested examples and reduces the CPU time by 54.1% on the average.","PeriodicalId":365422,"journal":{"name":"2011 IEEE International SOC Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Simultaneous escape routing based on routability-driven net ordering\",\"authors\":\"Jin-Tai Yan, Tung-Yen Sung, Zhi-Wei Chen\",\"doi\":\"10.1109/SOCC.2011.6085100\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, given a set of n escape nets between an array of pxq pins and an array of rxs pins, firstly, a routability-driven net order between two given pin arrays is determined for simultaneous escape routing. Furthermore, based on ordered escape routing for two pin arrays, an efficient approach is proposed to solve the routing problem for simultaneous escape routing. Compared with Kong's flow-based approach [11] for three tested examples, the experimental results show that our proposed approach achieves 100% routability for the tested examples and reduces the CPU time by 54.1% on the average.\",\"PeriodicalId\":365422,\"journal\":{\"name\":\"2011 IEEE International SOC Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2011.6085100\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2011.6085100","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simultaneous escape routing based on routability-driven net ordering
In this paper, given a set of n escape nets between an array of pxq pins and an array of rxs pins, firstly, a routability-driven net order between two given pin arrays is determined for simultaneous escape routing. Furthermore, based on ordered escape routing for two pin arrays, an efficient approach is proposed to solve the routing problem for simultaneous escape routing. Compared with Kong's flow-based approach [11] for three tested examples, the experimental results show that our proposed approach achieves 100% routability for the tested examples and reduces the CPU time by 54.1% on the average.
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