{"title":"基于FPGA的低成本视频流服务器","authors":"G. Stewart, D. Renshaw, M. Riley","doi":"10.1109/SPL.2007.371746","DOIUrl":null,"url":null,"abstract":"The design of a platform based video streaming server using the Xilinx microblaze processor and a custom H.263 hardware compression core is presented. The design uses a novel data structure to store the input images in external memory, allowing the H.263 core and the associated camera interface to utilise the external memory bandwidth more efficiently. The finished system is capable of encoding and streaming, using the real-time transport protocol, Dl sized video, at 30 frames per second in a Spartan-3 1500 FPGA device.","PeriodicalId":419253,"journal":{"name":"2007 3rd Southern Conference on Programmable Logic","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A Low-Cost, FPGA Based, Video Streaming Server\",\"authors\":\"G. Stewart, D. Renshaw, M. Riley\",\"doi\":\"10.1109/SPL.2007.371746\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design of a platform based video streaming server using the Xilinx microblaze processor and a custom H.263 hardware compression core is presented. The design uses a novel data structure to store the input images in external memory, allowing the H.263 core and the associated camera interface to utilise the external memory bandwidth more efficiently. The finished system is capable of encoding and streaming, using the real-time transport protocol, Dl sized video, at 30 frames per second in a Spartan-3 1500 FPGA device.\",\"PeriodicalId\":419253,\"journal\":{\"name\":\"2007 3rd Southern Conference on Programmable Logic\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 3rd Southern Conference on Programmable Logic\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SPL.2007.371746\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 3rd Southern Conference on Programmable Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2007.371746","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The design of a platform based video streaming server using the Xilinx microblaze processor and a custom H.263 hardware compression core is presented. The design uses a novel data structure to store the input images in external memory, allowing the H.263 core and the associated camera interface to utilise the external memory bandwidth more efficiently. The finished system is capable of encoding and streaming, using the real-time transport protocol, Dl sized video, at 30 frames per second in a Spartan-3 1500 FPGA device.