交错中继器高性能总线的节能编码

S. Jayaprakash, N. Mahapatra
{"title":"交错中继器高性能总线的节能编码","authors":"S. Jayaprakash, N. Mahapatra","doi":"10.1109/ISVLSI.2009.58","DOIUrl":null,"url":null,"abstract":"High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.","PeriodicalId":137508,"journal":{"name":"2009 IEEE Computer Society Annual Symposium on VLSI","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters\",\"authors\":\"S. Jayaprakash, N. Mahapatra\",\"doi\":\"10.1109/ISVLSI.2009.58\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.\",\"PeriodicalId\":137508,\"journal\":{\"name\":\"2009 IEEE Computer Society Annual Symposium on VLSI\",\"volume\":\"60 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE Computer Society Annual Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2009.58\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2009.58","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

高性能总线通常使用交错中继器,通过利用串扰的数据依赖性来减轻相邻导线之间最坏情况下电容串扰对延迟的不利影响。交错中继器的一个不受欢迎的副作用是,它们可能会增加承载与现实基准相关的高度相关流量的总线的总能量。在本文中,我们介绍了交错中继总线(SRB)配置的能量模型,并提出了一种低功耗动态编码方案,该方案在SPEC CPU2k基准测试中,对于数据和指令流量,SRB的平均总线能量减少分别超过28%和26%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Energy-Efficient Encoding for High-Performance Buses with Staggered Repeaters
High-performance buses often use staggered repeaters to mitigate the adverse impact on latency of worst-case capacitive crosstalk between adjacent wires by exploiting the data-dependent nature of crosstalk. An undesirable side effect of staggered repeaters is that they may increase the overall energy of a bus carrying highly correlated traffic associated with real-world benchmarks. In this paper, we introduce an energy model for a staggered-repeater bus (SRB)configuration and propose a low-power dynamic encoding scheme that yields average bus energy reductions for an SRB in excess of 28% and 26% for data and instruction traffic, respectively, for SPEC CPU2k benchmarks.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Novel Low Area Overhead Body Bias FPGA Architecture for Low Power Applications Synchronization-Based Abstraction Refinement for Modular Verification of Asynchronous Designs A Low-power Low-cost Optical Router for Optical Networks-on-Chip in Multiprocessor Systems-on-Chip Maximally Redundant High-Radix Signed-Digit Adder: New Algorithm and Implementation Overview of the Scalable Communications Core: A Reconfigurable Wireless Baseband in 65nm CMOS
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1