Energy-Efficient Near-Threshold Standard Cell Library for IoT Applications

In this paper, a low-energy minimum-area CMOS standard cell library suitable for IoT applications is proposed. Energy consumption reduction is achieved by operating the library in Near-Threshold Voltage (NTV) region, and by designing layout of cells at the minimum possible area for the used technology process. Body biasing technique is proposed to boost pMOS performance. Operating voltage and transistor sizing are also selected to achieve the minimum energy consumption while operating at the frequency range of 1MHz to 20MHz which is suitable for IoT applications. The proposed library was designed and characterized in UMC 130 nm CMOS technology process. The library was modeled to be used in synthesis tools. To prove the benefit for IoT applications, the library was benchmarked by implementing 3 cryptographic algorithms: ASCON, AEGIS-128, and AEZ. Synthesis results are showing that the three cores can operate at 18 MHz, 14 MHz, and 16 MHz respectively, while consuming 0.466 pJ, 3.006 pJ, and 5.064 pJ.