{"title":"矩阵乘积的下界","authors":"Amir Shpilka","doi":"10.1109/SFCS.2001.959910","DOIUrl":null,"url":null,"abstract":"We prove lower bounds on the number of product gates in bilinear and quadratic circuits that compute the product of two n /spl times/ n matrices over finite fields. In particular we obtain the following results: 1. We show that the number of product gates in any bilinear (or quadratic) circuit that computes the product of two n /spl times/ n matrices over GF(2) is at least 3n/sup 2/ o(n/sup 2/). 2. We show that the number of product gates in any bilinear circuit that computes the product of two n /spl times/ n matrices over GF(p) is at least (2.5 + 1.5/p/sup 3/-1)n/sup 2/ - o(n/sup 2/). These results improve the former results of N.H. Bshouty (1997) and M. Blaser (1999) who proved lower bounds of 2.5n/sup 2/ o(n/sup 2/).","PeriodicalId":378126,"journal":{"name":"Proceedings 2001 IEEE International Conference on Cluster Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"44","resultStr":"{\"title\":\"Lower bounds for matrix product\",\"authors\":\"Amir Shpilka\",\"doi\":\"10.1109/SFCS.2001.959910\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We prove lower bounds on the number of product gates in bilinear and quadratic circuits that compute the product of two n /spl times/ n matrices over finite fields. In particular we obtain the following results: 1. We show that the number of product gates in any bilinear (or quadratic) circuit that computes the product of two n /spl times/ n matrices over GF(2) is at least 3n/sup 2/ o(n/sup 2/). 2. We show that the number of product gates in any bilinear circuit that computes the product of two n /spl times/ n matrices over GF(p) is at least (2.5 + 1.5/p/sup 3/-1)n/sup 2/ - o(n/sup 2/). These results improve the former results of N.H. Bshouty (1997) and M. Blaser (1999) who proved lower bounds of 2.5n/sup 2/ o(n/sup 2/).\",\"PeriodicalId\":378126,\"journal\":{\"name\":\"Proceedings 2001 IEEE International Conference on Cluster Computing\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"44\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2001 IEEE International Conference on Cluster Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SFCS.2001.959910\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2001 IEEE International Conference on Cluster Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SFCS.2001.959910","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We prove lower bounds on the number of product gates in bilinear and quadratic circuits that compute the product of two n /spl times/ n matrices over finite fields. In particular we obtain the following results: 1. We show that the number of product gates in any bilinear (or quadratic) circuit that computes the product of two n /spl times/ n matrices over GF(2) is at least 3n/sup 2/ o(n/sup 2/). 2. We show that the number of product gates in any bilinear circuit that computes the product of two n /spl times/ n matrices over GF(p) is at least (2.5 + 1.5/p/sup 3/-1)n/sup 2/ - o(n/sup 2/). These results improve the former results of N.H. Bshouty (1997) and M. Blaser (1999) who proved lower bounds of 2.5n/sup 2/ o(n/sup 2/).
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