{"title":"通过异或和多数逻辑合成解锁可控极性晶体管的机会","authors":"P. Gaillardon, L. Amarù, G. Micheli","doi":"10.1109/ISVLSI.2014.107","DOIUrl":null,"url":null,"abstract":"For more than four decades, Complementary Metal-Oxide-Semiconductor (CMOS) Field Effect Transistors (FETs) have been the baseline technology for implementing digital computation systems. CMOS transistors natively implement Not-AND (NAND)- and Not-OR (NOR)-based logic operators. Nowadays, we observe a trend towards devices with an increased set of logic capabilities, i.e., with the ability to realize in a compact way specific logic operators as compared to the standard CMOS. In particular, controllable-polarity devices enable a native and compact realization of eXclusive-OR (XOR)- and MAJority (MAJ)- logic functions, and open a large panel of opportunities for future high-performance computing systems. However, main current logic synthesis tools exploit algorithms using NAND/NOR representations that are not able to fully exploit the capabilities of novel XOR- and MAJ-oriented technologies. In this paper, we review some recent work that aims at providing novel logic synthesis techniques that natively assess the logic capabilities of XOR- and MAJ-operators.","PeriodicalId":405755,"journal":{"name":"2014 IEEE Computer Society Annual Symposium on VLSI","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis\",\"authors\":\"P. Gaillardon, L. Amarù, G. Micheli\",\"doi\":\"10.1109/ISVLSI.2014.107\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"For more than four decades, Complementary Metal-Oxide-Semiconductor (CMOS) Field Effect Transistors (FETs) have been the baseline technology for implementing digital computation systems. CMOS transistors natively implement Not-AND (NAND)- and Not-OR (NOR)-based logic operators. Nowadays, we observe a trend towards devices with an increased set of logic capabilities, i.e., with the ability to realize in a compact way specific logic operators as compared to the standard CMOS. In particular, controllable-polarity devices enable a native and compact realization of eXclusive-OR (XOR)- and MAJority (MAJ)- logic functions, and open a large panel of opportunities for future high-performance computing systems. However, main current logic synthesis tools exploit algorithms using NAND/NOR representations that are not able to fully exploit the capabilities of novel XOR- and MAJ-oriented technologies. In this paper, we review some recent work that aims at providing novel logic synthesis techniques that natively assess the logic capabilities of XOR- and MAJ-operators.\",\"PeriodicalId\":405755,\"journal\":{\"name\":\"2014 IEEE Computer Society Annual Symposium on VLSI\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE Computer Society Annual Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2014.107\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2014.107","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis
For more than four decades, Complementary Metal-Oxide-Semiconductor (CMOS) Field Effect Transistors (FETs) have been the baseline technology for implementing digital computation systems. CMOS transistors natively implement Not-AND (NAND)- and Not-OR (NOR)-based logic operators. Nowadays, we observe a trend towards devices with an increased set of logic capabilities, i.e., with the ability to realize in a compact way specific logic operators as compared to the standard CMOS. In particular, controllable-polarity devices enable a native and compact realization of eXclusive-OR (XOR)- and MAJority (MAJ)- logic functions, and open a large panel of opportunities for future high-performance computing systems. However, main current logic synthesis tools exploit algorithms using NAND/NOR representations that are not able to fully exploit the capabilities of novel XOR- and MAJ-oriented technologies. In this paper, we review some recent work that aims at providing novel logic synthesis techniques that natively assess the logic capabilities of XOR- and MAJ-operators.