Chao Guo, Yingmei Chen, Y. Chen, Wentian Fan, En Zhu, Zhengfei Hu
{"title":"采用0.13μm SiGe BiCMOS技术的160 GBaud PAM-4模拟复用器","authors":"Chao Guo, Yingmei Chen, Y. Chen, Wentian Fan, En Zhu, Zhengfei Hu","doi":"10.1109/ASSP57481.2022.00012","DOIUrl":null,"url":null,"abstract":"This article presents a 2:1 analog multiplexer (AMUX) for a digital preprocessed analog-multiplexed digital-to-analog converter (DP-AM-DAC) in optical transmitter, which can generate a 160 GBaud (320 Gb/s) four-level pulse-amplitude modulation (PAM-4) signal. The AMUX was designed in 0.13μm BiCMOS technology that contains bipolar devices based on SiGe:C NPN-heterojunction bipolar transistor's (HBT's) with up to 300 GHz transient frequency and 500 GHz oscillation frequency. The AMUX with fully differential configurations, consisting of two data input buffers, a three-stage polyphase filter, two clock input buffers, an AMUX core, and an output buffer, occupies an area of 1.143×1.078 mm2 and consumes 1.52-W from 5 V and 6 V supplies. This AMUX could meet the requirements of the 160 GBaud class systems by using the SiGe BiCMOS technology that has low cost and can be integrated with CMOS compared with the InP HBT-designed AMUX.","PeriodicalId":177232,"journal":{"name":"2022 3rd Asia Symposium on Signal Processing (ASSP)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 160 GBaud PAM-4 Analog Multiplexer in 0.13μm SiGe BiCMOS technology\",\"authors\":\"Chao Guo, Yingmei Chen, Y. Chen, Wentian Fan, En Zhu, Zhengfei Hu\",\"doi\":\"10.1109/ASSP57481.2022.00012\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This article presents a 2:1 analog multiplexer (AMUX) for a digital preprocessed analog-multiplexed digital-to-analog converter (DP-AM-DAC) in optical transmitter, which can generate a 160 GBaud (320 Gb/s) four-level pulse-amplitude modulation (PAM-4) signal. The AMUX was designed in 0.13μm BiCMOS technology that contains bipolar devices based on SiGe:C NPN-heterojunction bipolar transistor's (HBT's) with up to 300 GHz transient frequency and 500 GHz oscillation frequency. The AMUX with fully differential configurations, consisting of two data input buffers, a three-stage polyphase filter, two clock input buffers, an AMUX core, and an output buffer, occupies an area of 1.143×1.078 mm2 and consumes 1.52-W from 5 V and 6 V supplies. This AMUX could meet the requirements of the 160 GBaud class systems by using the SiGe BiCMOS technology that has low cost and can be integrated with CMOS compared with the InP HBT-designed AMUX.\",\"PeriodicalId\":177232,\"journal\":{\"name\":\"2022 3rd Asia Symposium on Signal Processing (ASSP)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 3rd Asia Symposium on Signal Processing (ASSP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASSP57481.2022.00012\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 3rd Asia Symposium on Signal Processing (ASSP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSP57481.2022.00012","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 160 GBaud PAM-4 Analog Multiplexer in 0.13μm SiGe BiCMOS technology
This article presents a 2:1 analog multiplexer (AMUX) for a digital preprocessed analog-multiplexed digital-to-analog converter (DP-AM-DAC) in optical transmitter, which can generate a 160 GBaud (320 Gb/s) four-level pulse-amplitude modulation (PAM-4) signal. The AMUX was designed in 0.13μm BiCMOS technology that contains bipolar devices based on SiGe:C NPN-heterojunction bipolar transistor's (HBT's) with up to 300 GHz transient frequency and 500 GHz oscillation frequency. The AMUX with fully differential configurations, consisting of two data input buffers, a three-stage polyphase filter, two clock input buffers, an AMUX core, and an output buffer, occupies an area of 1.143×1.078 mm2 and consumes 1.52-W from 5 V and 6 V supplies. This AMUX could meet the requirements of the 160 GBaud class systems by using the SiGe BiCMOS technology that has low cost and can be integrated with CMOS compared with the InP HBT-designed AMUX.