多路容错芯片多处理器的自适应执行辅助

2011 IEEE 29th International Conference on Computer Design (ICCD) Pub Date : 2011-10-09 DOI:10.1109/ICCD.2011.6081432

Pramod Subramanyan, Virendra Singh, K. Saluja, E. Larsson

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引用次数: 1

摘要

CMOS制造技术的不断扩展使得当代集成电路越来越容易受到瞬态故障、磨损相关的永久故障、间歇性故障和工艺变化的影响。因此，减轻可靠性下降影响的机制有望成为未来通用微处理器的重要组成部分。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors

Relentless scaling of CMOS fabrication technology has made contemporary integrated circuits increasingly susceptible to transient faults, wearout-related permanent faults, intermittent faults and process variations. Therefore, mechanisms to mitigate the effects of decreased reliability are expected to become essential components of future general-purpose microprocessors.

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2011 IEEE 29th International Conference on Computer Design (ICCD)

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