3-D集成的硬件信任含义

WESS '10 Pub Date : 2010-10-24 DOI:10.1145/1873548.1873549
Ted Huffmire, T. Levin, Michael Bilzor, C. Irvine, Jonathan Valamehr, Mohit Tiwari, T. Sherwood, R. Kastner
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引用次数: 16

摘要

三维电路级集成是一种芯片制造技术,其中两个或多个芯片堆叠并通过使用垂直导电柱组合成单个电路。由于模具可以单独制造,3-D电路集成提供了增强具有各种安全功能的商品处理器的选择。本文对三维设计方法进行了探讨,并进行了分析,认为连接模系统要提供一定的可靠功能,不需要商品模系统独立可靠。除了描述可能的安全增强(如加密服务)的范围外,我们还描述了多模子系统相互依赖的方式,以及一组处理抽象和通用设计约束,并提供了解决这些依赖关系的示例。
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Hardware trust implications of 3-D integration
3-D circuit-level integration is a chip fabrication technique in which two or more dies are stacked and combined into a single circuit through the use of vertical electroconductive posts. Since the dies may be manufactured separately, 3-D circuit integration offers the option of enhancing a commodity processor with a variety of security functions. This paper examines the 3-D design approach and provides an analysis concluding that the commodity die system need not be independently trustworthy for the system of joined dies to provide certain trustworthy functions. In addition to describing the range of possible security enhancements (such as cryptographic services), we describe the ways in which multiple-die subsystems can depend on each other, and a set of processing abstractions and general design constraints with examples to address these dependencies.
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