{"title":"基于深度学习算法的可编程视觉芯片芯片级验证方法","authors":"Xuemin Zheng, Mingxin Zhao, Qian Luo, Shuangming Yu, Liyuan Liu, N. Wu","doi":"10.1109/ICICM50929.2020.9292281","DOIUrl":null,"url":null,"abstract":"The past five years has witnessed tremendous success of deep learning (DL) algorithm in the computer vision field, attributing to its high degree of accuracy on numerous visual tasks. Unfortunately, for the development of programmable vision chips, algorithm verification remains a major challenge due to the high computational complexity of the DL neural network. In this paper, we propose a novel chip-level verification method to address the common issues including low efficiency and poor reusability in verifying vision chips. In contrast to the block-level verification technique, this method focuses on the rapid implementation of the complete DL algorithm in chip-level verification, fulfilling the advanced demands of vision chip prior to the tape-out. The experiments on MobileNet-v1 indicates the significant reduction of the simulation time and debugging overheads via the proposed verification method.","PeriodicalId":364285,"journal":{"name":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Chip-Level Verification Method for Programmable Vision Chip Based on Deep Learning Algorithms\",\"authors\":\"Xuemin Zheng, Mingxin Zhao, Qian Luo, Shuangming Yu, Liyuan Liu, N. Wu\",\"doi\":\"10.1109/ICICM50929.2020.9292281\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The past five years has witnessed tremendous success of deep learning (DL) algorithm in the computer vision field, attributing to its high degree of accuracy on numerous visual tasks. Unfortunately, for the development of programmable vision chips, algorithm verification remains a major challenge due to the high computational complexity of the DL neural network. In this paper, we propose a novel chip-level verification method to address the common issues including low efficiency and poor reusability in verifying vision chips. In contrast to the block-level verification technique, this method focuses on the rapid implementation of the complete DL algorithm in chip-level verification, fulfilling the advanced demands of vision chip prior to the tape-out. The experiments on MobileNet-v1 indicates the significant reduction of the simulation time and debugging overheads via the proposed verification method.\",\"PeriodicalId\":364285,\"journal\":{\"name\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-10-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICM50929.2020.9292281\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE 5th International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICM50929.2020.9292281","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Chip-Level Verification Method for Programmable Vision Chip Based on Deep Learning Algorithms
The past five years has witnessed tremendous success of deep learning (DL) algorithm in the computer vision field, attributing to its high degree of accuracy on numerous visual tasks. Unfortunately, for the development of programmable vision chips, algorithm verification remains a major challenge due to the high computational complexity of the DL neural network. In this paper, we propose a novel chip-level verification method to address the common issues including low efficiency and poor reusability in verifying vision chips. In contrast to the block-level verification technique, this method focuses on the rapid implementation of the complete DL algorithm in chip-level verification, fulfilling the advanced demands of vision chip prior to the tape-out. The experiments on MobileNet-v1 indicates the significant reduction of the simulation time and debugging overheads via the proposed verification method.