CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links

Traditional many-core designs based on the Network-on-Chip (NoC) paradigm suffer from high latency and power dissipation as the system size scales up due to their inherent multi-hop communication. NoC performance can be significantly enhanced by introducing long-range, low power, and high-bandwidth single-hop wireless links between far apart cores. This paper presents a design methodology and performance evaluation for a hierarchical small-world NoC with CMOS compatible on-chip millimeter (mm)-wave wireless long-range communication links. The proposed wireless NoC offers significantly higher bandwidth and lower energy dissipation compared to its conventional non-hierarchical wired counterpart in presence of both uniform and non-uniform traffic patterns. The performance improvement is achieved through efficient data routing and optimum placement of wireless hubs. Multiple wireless shortcuts operating simultaneously provide an energy efficient solution for design of many-core communication infrastructures.