{"title":"异构MPSoC平台的功能级性能估计","authors":"D. Ivosevic, Nikolina Frid, V. Sruk","doi":"10.1109/ZINC.2016.7513650","DOIUrl":null,"url":null,"abstract":"Main challenge of system-level design is fast and accurate performance estimation on heterogeneous multiprocessor system-on-chip (MPSoC) platforms in early design stages. In this paper the authors present a design flow of a novel framework for automated early high-level software performance estimation based on source code analysis using elementary operation concept. The tools implemented within the framework support performance evaluation by application C code intermediate representation analysis and production of profiling data per single line of code instruction. The concept of elementary operation usage in gaining the appropriate application profiling is tested on two processor cores as representatives of different processing elements often used inside MPSoC platforms. Preliminary results demonstrate the ability to provide fast and efficient design space exploration with high accuracy of performance estimation.","PeriodicalId":125652,"journal":{"name":"2016 Zooming Innovation in Consumer Electronics International Conference (ZINC)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Function-level performance estimation for heterogeneous MPSoC platforms\",\"authors\":\"D. Ivosevic, Nikolina Frid, V. Sruk\",\"doi\":\"10.1109/ZINC.2016.7513650\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Main challenge of system-level design is fast and accurate performance estimation on heterogeneous multiprocessor system-on-chip (MPSoC) platforms in early design stages. In this paper the authors present a design flow of a novel framework for automated early high-level software performance estimation based on source code analysis using elementary operation concept. The tools implemented within the framework support performance evaluation by application C code intermediate representation analysis and production of profiling data per single line of code instruction. The concept of elementary operation usage in gaining the appropriate application profiling is tested on two processor cores as representatives of different processing elements often used inside MPSoC platforms. Preliminary results demonstrate the ability to provide fast and efficient design space exploration with high accuracy of performance estimation.\",\"PeriodicalId\":125652,\"journal\":{\"name\":\"2016 Zooming Innovation in Consumer Electronics International Conference (ZINC)\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 Zooming Innovation in Consumer Electronics International Conference (ZINC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ZINC.2016.7513650\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 Zooming Innovation in Consumer Electronics International Conference (ZINC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ZINC.2016.7513650","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Function-level performance estimation for heterogeneous MPSoC platforms
Main challenge of system-level design is fast and accurate performance estimation on heterogeneous multiprocessor system-on-chip (MPSoC) platforms in early design stages. In this paper the authors present a design flow of a novel framework for automated early high-level software performance estimation based on source code analysis using elementary operation concept. The tools implemented within the framework support performance evaluation by application C code intermediate representation analysis and production of profiling data per single line of code instruction. The concept of elementary operation usage in gaining the appropriate application profiling is tested on two processor cores as representatives of different processing elements often used inside MPSoC platforms. Preliminary results demonstrate the ability to provide fast and efficient design space exploration with high accuracy of performance estimation.