{"title":"DP4T射频开关用虚拟仪器的MOSFET表征过程综述","authors":"V. Srivastava, K. S. Yadav, G. Singh","doi":"10.4236/wsn.2011.38031","DOIUrl":null,"url":null,"abstract":"With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has good performances but only for a single operating frequency. For multiple operating frequencies, to transmitting or receiving information through the multiple antennas systems, known as MIMO systems, it a new RF switch is required which should be capable of operating with multiple antennas and frequencies as well as minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw (DP4T) RF switch and in this research article we are discussing a process for the characterization of the MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented. For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured opti-cally. Some of the calculated material parameters are away from the expected values. These errors might be due to several factors such as a possible offset capacitance of the probes due to improper contact with the wafer which is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineering Environment Programming (VEE Pro, a Agilent product).","PeriodicalId":251051,"journal":{"name":"Wirel. Sens. Netw.","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-08-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch - A Review\",\"authors\":\"V. Srivastava, K. S. Yadav, G. Singh\",\"doi\":\"10.4236/wsn.2011.38031\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has good performances but only for a single operating frequency. For multiple operating frequencies, to transmitting or receiving information through the multiple antennas systems, known as MIMO systems, it a new RF switch is required which should be capable of operating with multiple antennas and frequencies as well as minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw (DP4T) RF switch and in this research article we are discussing a process for the characterization of the MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented. For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured opti-cally. Some of the calculated material parameters are away from the expected values. These errors might be due to several factors such as a possible offset capacitance of the probes due to improper contact with the wafer which is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineering Environment Programming (VEE Pro, a Agilent product).\",\"PeriodicalId\":251051,\"journal\":{\"name\":\"Wirel. Sens. Netw.\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-08-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Wirel. Sens. Netw.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.4236/wsn.2011.38031\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Wirel. Sens. Netw.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4236/wsn.2011.38031","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization Process of MOSFET with Virtual Instrumentation for DP4T RF Switch - A Review
With the increasing interest in radio frequency switch by using the CMOS circuit technology for the wireless communication systems is in demand. A traditional n-MOS Single-Pole Double-Throw (SPDT) switch has good performances but only for a single operating frequency. For multiple operating frequencies, to transmitting or receiving information through the multiple antennas systems, known as MIMO systems, it a new RF switch is required which should be capable of operating with multiple antennas and frequencies as well as minimizing signal distortions and power consumption. We already have proposed a Double-Pole Four-Throw (DP4T) RF switch and in this research article we are discussing a process for the characterization of the MOSFET with Virtual Instrumentation. The procedure to characterize oxide and conductor layers that are grown or deposited on semiconductors is by studying the characteristics of a MOS capacitor that is formed of the conductor (Metal)-insulator-semiconductor layers for the purpose of RF CMOS as a switch is presented. For a capacitor formed of Metal-silicon dioxide-silicon layers with a thick oxide measured opti-cally. Some of the calculated material parameters are away from the expected values. These errors might be due to several factors such as a possible offset capacitance of the probes due to improper contact with the wafer which is measured by using the LCR (Inductance-Capacitance-Resistance) meter with the help of Visual Engineering Environment Programming (VEE Pro, a Agilent product).