Şadiye Akdeniz Ağdere, Melih Karasubaşi, Hüseyin Sagirkaya
{"title":"国产飞行控制系统测试","authors":"Şadiye Akdeniz Ağdere, Melih Karasubaşi, Hüseyin Sagirkaya","doi":"10.1109/AUTOTESTCON47462.2022.9984752","DOIUrl":null,"url":null,"abstract":"Hardware-in-the-Loop (HIL) simulation technique provides a solution to perform tests without risking damage to Line-Replaceable-Unit (LRU) and reduce costs via increasing the speed of continuous verification and validation. As an important part of verification and validation phase of a system, the Hardware-in-the-Loop simulation is one of the most effective techniques for an LRU system testing and makes a substantial contribution in avionics model integration process and realization of the system. Based on the Hardware-in-the-Loop simulation method, this paper designs the structure and parameters of a Hardware-in-the-Loop simulation test system for an indigenous flight control computer system test. This test system comprises of plant models, signal generation module, data acquisition module, record module, switching module for signal loss and error injection scenarios, and a graphical user interface. Test system includes a Peripheral Component Interconnect Extension for Instrumentation (PXI) chassis with a real-time operating system, hardware capable of converting the digital signals generated by an aircraft model into analog signals proper to LRU input signals and transmitting to LRU, also hardware capable of converting the digital signals generated by the flight control computer into analog signals to the control model and, moreover a recording unit in which all these signals are logged in parallel with data acquisition process.","PeriodicalId":298798,"journal":{"name":"2022 IEEE AUTOTESTCON","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Indigenous Flight Control System Test\",\"authors\":\"Şadiye Akdeniz Ağdere, Melih Karasubaşi, Hüseyin Sagirkaya\",\"doi\":\"10.1109/AUTOTESTCON47462.2022.9984752\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hardware-in-the-Loop (HIL) simulation technique provides a solution to perform tests without risking damage to Line-Replaceable-Unit (LRU) and reduce costs via increasing the speed of continuous verification and validation. As an important part of verification and validation phase of a system, the Hardware-in-the-Loop simulation is one of the most effective techniques for an LRU system testing and makes a substantial contribution in avionics model integration process and realization of the system. Based on the Hardware-in-the-Loop simulation method, this paper designs the structure and parameters of a Hardware-in-the-Loop simulation test system for an indigenous flight control computer system test. This test system comprises of plant models, signal generation module, data acquisition module, record module, switching module for signal loss and error injection scenarios, and a graphical user interface. Test system includes a Peripheral Component Interconnect Extension for Instrumentation (PXI) chassis with a real-time operating system, hardware capable of converting the digital signals generated by an aircraft model into analog signals proper to LRU input signals and transmitting to LRU, also hardware capable of converting the digital signals generated by the flight control computer into analog signals to the control model and, moreover a recording unit in which all these signals are logged in parallel with data acquisition process.\",\"PeriodicalId\":298798,\"journal\":{\"name\":\"2022 IEEE AUTOTESTCON\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE AUTOTESTCON\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/AUTOTESTCON47462.2022.9984752\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE AUTOTESTCON","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AUTOTESTCON47462.2022.9984752","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware-in-the-Loop (HIL) simulation technique provides a solution to perform tests without risking damage to Line-Replaceable-Unit (LRU) and reduce costs via increasing the speed of continuous verification and validation. As an important part of verification and validation phase of a system, the Hardware-in-the-Loop simulation is one of the most effective techniques for an LRU system testing and makes a substantial contribution in avionics model integration process and realization of the system. Based on the Hardware-in-the-Loop simulation method, this paper designs the structure and parameters of a Hardware-in-the-Loop simulation test system for an indigenous flight control computer system test. This test system comprises of plant models, signal generation module, data acquisition module, record module, switching module for signal loss and error injection scenarios, and a graphical user interface. Test system includes a Peripheral Component Interconnect Extension for Instrumentation (PXI) chassis with a real-time operating system, hardware capable of converting the digital signals generated by an aircraft model into analog signals proper to LRU input signals and transmitting to LRU, also hardware capable of converting the digital signals generated by the flight control computer into analog signals to the control model and, moreover a recording unit in which all these signals are logged in parallel with data acquisition process.