G. Formicone, F. Boueri, J. Burger, W. Cheng, Y. Kim, J. Titizian
{"title":"航空电子射频LDMOS中偏置对VSWR坚固性的影响分析","authors":"G. Formicone, F. Boueri, J. Burger, W. Cheng, Y. Kim, J. Titizian","doi":"10.1109/EMICC.2008.4772220","DOIUrl":null,"url":null,"abstract":"A 210 W RF LDMOS power transistor optimized for pulsed applications has been used to characterize VSWR ruggedness as a function of bias and gain compression. The ruggedness test used is the 10:1 VSWR load mismatch. The transistor, operated in class AB power amplifier, can deliver 210 W of output power when biased at 32 V (P3dB) or 36 V (P1dB), having a minimum breakdown voltage of 85 V. In both conditions the transistor passes 4:1 VSWR mismatch without degradation. We also found that when operated at 32 V and 210 W (3dB compression) the transistor passes 10:1 VSWR load mismatch without any degradation. On the contrary, when operated at 36 V (1dB compression), the transistor either goes into catastrophic failure or it survives the mismatch test with a severe power rating degradation in excess of 5%. Measured electrical data and simulated junction temperature data help explaining the different results on the VSWR ruggedness.","PeriodicalId":344657,"journal":{"name":"2008 European Microwave Integrated Circuit Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Analysis of Bias Effects on VSWR Ruggedness in RF LDMOS for Avionics Applications\",\"authors\":\"G. Formicone, F. Boueri, J. Burger, W. Cheng, Y. Kim, J. Titizian\",\"doi\":\"10.1109/EMICC.2008.4772220\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 210 W RF LDMOS power transistor optimized for pulsed applications has been used to characterize VSWR ruggedness as a function of bias and gain compression. The ruggedness test used is the 10:1 VSWR load mismatch. The transistor, operated in class AB power amplifier, can deliver 210 W of output power when biased at 32 V (P3dB) or 36 V (P1dB), having a minimum breakdown voltage of 85 V. In both conditions the transistor passes 4:1 VSWR mismatch without degradation. We also found that when operated at 32 V and 210 W (3dB compression) the transistor passes 10:1 VSWR load mismatch without any degradation. On the contrary, when operated at 36 V (1dB compression), the transistor either goes into catastrophic failure or it survives the mismatch test with a severe power rating degradation in excess of 5%. Measured electrical data and simulated junction temperature data help explaining the different results on the VSWR ruggedness.\",\"PeriodicalId\":344657,\"journal\":{\"name\":\"2008 European Microwave Integrated Circuit Conference\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 European Microwave Integrated Circuit Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMICC.2008.4772220\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 European Microwave Integrated Circuit Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMICC.2008.4772220","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
一种针对脉冲应用优化的210 W射频LDMOS功率晶体管被用来表征VSWR稳稳性作为偏置和增益压缩的函数。使用的坚固性测试是10:1的VSWR负载不匹配。该晶体管工作在AB类功率放大器中,当偏置在32 V (P3dB)或36 V (P1dB)时,可提供210 W的输出功率,最小击穿电压为85 V。在这两种情况下,晶体管通过4:1的VSWR失配而没有退化。我们还发现,当工作在32v和210w (3dB压缩)时,晶体管通过10:1的VSWR负载不匹配而没有任何退化。相反,当工作在36v (1dB压缩)时,晶体管要么进入灾难性故障,要么在失配测试中幸存下来,额定功率下降超过5%。测量的电气数据和模拟结温数据有助于解释VSWR坚固性的不同结果。
Analysis of Bias Effects on VSWR Ruggedness in RF LDMOS for Avionics Applications
A 210 W RF LDMOS power transistor optimized for pulsed applications has been used to characterize VSWR ruggedness as a function of bias and gain compression. The ruggedness test used is the 10:1 VSWR load mismatch. The transistor, operated in class AB power amplifier, can deliver 210 W of output power when biased at 32 V (P3dB) or 36 V (P1dB), having a minimum breakdown voltage of 85 V. In both conditions the transistor passes 4:1 VSWR mismatch without degradation. We also found that when operated at 32 V and 210 W (3dB compression) the transistor passes 10:1 VSWR load mismatch without any degradation. On the contrary, when operated at 36 V (1dB compression), the transistor either goes into catastrophic failure or it survives the mismatch test with a severe power rating degradation in excess of 5%. Measured electrical data and simulated junction temperature data help explaining the different results on the VSWR ruggedness.