{"title":"非线性数字滤波器在DSP阵列处理器上的实现","authors":"H. Kwan, E. Powers, E. Swartzlander","doi":"10.1109/ASAP.1997.606809","DOIUrl":null,"url":null,"abstract":"This paper presents the performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. Speed-up results indicate that the \"time-skewing\" method is currently the fastest. An application to nonlinear communication channel equalization using a 64-QAM signal constellation is presented.","PeriodicalId":368315,"journal":{"name":"Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Realization of a nonlinear digital filter on a DSP array processor\",\"authors\":\"H. Kwan, E. Powers, E. Swartzlander\",\"doi\":\"10.1109/ASAP.1997.606809\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. Speed-up results indicate that the \\\"time-skewing\\\" method is currently the fastest. An application to nonlinear communication channel equalization using a 64-QAM signal constellation is presented.\",\"PeriodicalId\":368315,\"journal\":{\"name\":\"Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-07-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASAP.1997.606809\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASAP.1997.606809","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Realization of a nonlinear digital filter on a DSP array processor
This paper presents the performance evaluation of a fast third-order Volterra digital filtering algorithm mapped onto an AT&T DSP-3 parallel processor. Five different implementations are considered. Speed-up results indicate that the "time-skewing" method is currently the fastest. An application to nonlinear communication channel equalization using a 64-QAM signal constellation is presented.
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