{"title":"完全并行联想记忆与人类记忆型学习模式","authors":"M. Abedin, A. Ahmadi, T. Koide, H. Mattausch","doi":"10.1109/ICCITECHN.2007.4579361","DOIUrl":null,"url":null,"abstract":"In this paper, fully parallel associative memory architecture with learning model is proposed. It uses a mixed digital-analog associative memory for reference pattern recognition and a learning model based on a short and long-term memory similar to that in human brain. In addition a ranking mechanism is used to manage the transition of reference vectors between two memories and an optimization algorithm is used to adjust the reference vectors components as well as their distribution continuously. The main advantage of the proposed model is no need to pre-training phase as well as its hardware-friendly structure which makes it implementable by an efficient LSI architecture without requiring a large amount of resources. The system was implemented on an FPGA platform and tested with real data of handwritten and printed English characters and the classification results found satisfactory.","PeriodicalId":338170,"journal":{"name":"2007 10th international conference on computer and information technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fully parallel associative memory with human memory type learning model\",\"authors\":\"M. Abedin, A. Ahmadi, T. Koide, H. Mattausch\",\"doi\":\"10.1109/ICCITECHN.2007.4579361\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, fully parallel associative memory architecture with learning model is proposed. It uses a mixed digital-analog associative memory for reference pattern recognition and a learning model based on a short and long-term memory similar to that in human brain. In addition a ranking mechanism is used to manage the transition of reference vectors between two memories and an optimization algorithm is used to adjust the reference vectors components as well as their distribution continuously. The main advantage of the proposed model is no need to pre-training phase as well as its hardware-friendly structure which makes it implementable by an efficient LSI architecture without requiring a large amount of resources. The system was implemented on an FPGA platform and tested with real data of handwritten and printed English characters and the classification results found satisfactory.\",\"PeriodicalId\":338170,\"journal\":{\"name\":\"2007 10th international conference on computer and information technology\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 10th international conference on computer and information technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCITECHN.2007.4579361\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 10th international conference on computer and information technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCITECHN.2007.4579361","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully parallel associative memory with human memory type learning model
In this paper, fully parallel associative memory architecture with learning model is proposed. It uses a mixed digital-analog associative memory for reference pattern recognition and a learning model based on a short and long-term memory similar to that in human brain. In addition a ranking mechanism is used to manage the transition of reference vectors between two memories and an optimization algorithm is used to adjust the reference vectors components as well as their distribution continuously. The main advantage of the proposed model is no need to pre-training phase as well as its hardware-friendly structure which makes it implementable by an efficient LSI architecture without requiring a large amount of resources. The system was implemented on an FPGA platform and tested with real data of handwritten and printed English characters and the classification results found satisfactory.