Memristor-Based CiM Architecture for Big Data Era

In this paper, memristor based Computation-in-Memory (CiM) architecture is introduced to mitigate today’s challenges faced with the conventional CMOS technologies and von Neumann architecture due to the emergence of Big data era. Memristor material has shown through design and simulation as presented in this paper where necessary to have high switching speed, non-volatile capability, compact density using crossbar array, chaotic and non-binary ability, almost zero power and current leakage thus making memristor-based Computation-in-Memory architecture the needed technology revolution to mitigate these Big data computing limits caused by the conventional computer architecture and CMOS process technologies. The CMOS technologies and von Neumann architecture have reached fabrication physical limit as transistor scaling goes below 45nm technology node thus resulting to increasing delays that occur in the metal interconnect for signal propagation in transistors, power leakages, low data reliability, security issues, and high cost of developing and building CMOS chip-fabrication facilities as scaling goes down below 45nm.