ACCGen:一个自动ArchC编译器生成器

R. Auler, P. Centoducatte, E. Borin
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引用次数: 7

摘要

目前的电路集成水平导致了复杂的设计,包括在单个芯片上的完整系统,称为片上系统(SoC)。为了预测最佳设计方案并降低设计成本,设计师需要在设计的早期阶段进行大量的设计空间探索。为了加快这一过程,采用电子设计自动化(EDA)工具对系统进行建模和实验。ArchC是一种“架构描述语言”(Architecture Description Language, ADL)和一组工具,可用于基于高级系统模型自动构建SoC模拟器,从而在设计的早期阶段实现轻松快速的设计空间探索。目前,ArchC能够为给定的体系结构模型自动生成硬件模拟器、汇编器和链接器。在这项工作中,我们介绍了ACCGen,一个用于ArchC的自动编译器生成器,它是ArchC自动生成编译器工具链中缺失的一环。我们的实验结果表明,ACCGen生成的编译器对于Mibench应用程序是正确的。它们还比较了LLVM和gcc这两个著名的开源编译器生成的代码质量。我们还表明,ACCGen是快速的,对设计空间探索周转时间的影响很小,允许设计师,使用一个简单的和完全自动化的工作流程,在不到2分钟的时间内完全评估建筑变更的结果。
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ACCGen: An Automatic ArchC Compiler Generator
The current level of circuit integration led to complex designs encompassing full systems on a single chip, known as System-on-a-Chip (SoC). In order to predict the best design options and reduce the design costs, designers are required to perform a large design space exploration on early stages of the design. To speed up this process, Electronic Design Automation (EDA) tools are employed to model and experiment with the system. ArchC is an "Architecture Description Language" (ADL) and a set of tools that can be leveraged to automatically build SoC simulators based on high-level system models, enabling easy and fast design space exploration in early stages of the design. Currently, ArchC is capable of automatically generating hardware simulators, assemblers, and linkers for a given architecture model. In this work, we present ACCGen, an automatic Compiler Generator for ArchC, the missing link on the automatic generation of compiler tool chains for ArchC. Our experimental results show that compilers generated by ACCGen are correct for Mibench applications. They compare, as well, the generated code quality with LLVM and gcc, two well-known open-source compilers. We also show that ACCGen is fast and has little impact on the design space exploration turnaround time, allowing the designer to, using an easy and fully automated workflow, completely assess the outcome of architectural changes in less than 2 minutes.
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